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Searched refs:MC_CG_ARB_FREQ_F1 (Results 1 – 15 of 15) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
HDrv730_dpm.c33 #define MC_CG_ARB_FREQ_F1 0x0b macro
HDni_dpm.c35 #define MC_CG_ARB_FREQ_F1 0x0b macro
1518 case MC_CG_ARB_FREQ_F1: in ni_copy_and_switch_arb_sets()
1543 case MC_CG_ARB_FREQ_F1: in ni_copy_and_switch_arb_sets()
1582 tmp |= ((u32)MC_CG_ARB_FREQ_F1) << 24; in ni_init_arb_table_index()
1590 return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); in ni_initial_switch_from_arb_f0_to_f1()
HDcypress_dpm.c36 #define MC_CG_ARB_FREQ_F1 0x0b macro
794 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
HDrv770_dpm.c36 #define MC_CG_ARB_FREQ_F1 0x0b macro
709 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
HDbtc_dpm.c36 #define MC_CG_ARB_FREQ_F1 0x0b macro
HDci_dpm.c36 #define MC_CG_ARB_FREQ_F1 0x0b macro
2459 tmp |= MC_CG_ARB_FREQ_F1 << 24; in ci_init_arb_table_index()
2508 return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); in ci_initial_switch_from_arb_f0_to_f1()
HDsi_dpm.c35 #define MC_CG_ARB_FREQ_F1 0x0b macro
4237 tmp |= MC_CG_ARB_FREQ_F1 << 24; in si_init_arb_table_index()
4244 return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); in si_initial_switch_from_arb_f0_to_f1()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
HDsmu7_hwmgr.c54 #define MC_CG_ARB_FREQ_F1 0x0b macro
459 case MC_CG_ARB_FREQ_F1: in smu7_copy_and_switch_arb_sets()
474 case MC_CG_ARB_FREQ_F1: in smu7_copy_and_switch_arb_sets()
506 MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); in smu7_initial_switch_from_arbf0_to_f1()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
HDpolaris10_smumgr.c57 #define MC_CG_ARB_FREQ_F1 0x0b macro
1741 tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24; in polaris10_init_arb_table_index()
HDfiji_smumgr.c58 #define MC_CG_ARB_FREQ_F1 0x0b macro
1897 tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24; in fiji_init_arb_table_index()
HDtonga_smumgr.c59 #define MC_CG_ARB_FREQ_F1 0x0b macro
1809 tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24; in tonga_init_arb_table_index()
HDvegam_smumgr.c56 #define MC_CG_ARB_FREQ_F1 0x0b macro
HDiceland_smumgr.c64 #define MC_CG_ARB_FREQ_F1 0x0b macro
HDci_smumgr.c58 #define MC_CG_ARB_FREQ_F1 0x0b macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDsi_dpm.c40 #define MC_CG_ARB_FREQ_F1 0x0b macro
3093 case MC_CG_ARB_FREQ_F1: in ni_copy_and_switch_arb_sets()
3118 case MC_CG_ARB_FREQ_F1: in ni_copy_and_switch_arb_sets()
4701 tmp |= MC_CG_ARB_FREQ_F1 << 24; in si_init_arb_table_index()
4709 return ni_copy_and_switch_arb_sets(adev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); in si_initial_switch_from_arb_f0_to_f1()