Home
last modified time | relevance | path

Searched refs:LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h7638 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x00000010 macro
HDdce_8_0_sh_mask.h3216 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10 macro
HDdce_10_0_sh_mask.h3138 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10 macro
HDdce_11_0_sh_mask.h3208 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10 macro
HDdce_11_2_sh_mask.h3456 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10 macro
HDdce_12_0_sh_mask.h9284 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h40033 #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT … macro