Searched refs:INPUT_GAMMA_CONTROL (Results 1 – 4 of 4) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| HD | dce_ipp.h | 48 SRI(INPUT_GAMMA_CONTROL, DCP, id), \
94 IPP_SF(INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, mask_sh), \
212 uint32_t INPUT_GAMMA_CONTROL; member
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| HD | dce_ipp.c | 164 REG_UPDATE(INPUT_GAMMA_CONTROL, in dce_ipp_program_prescale()
214 REG_UPDATE(INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, 0); in dce_ipp_program_input_lut()
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| HD | dce_v10_0.c | 2098 tmp = REG_SET_FIELD(tmp, INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, 0); in dce_v10_0_crtc_load_lut()
2099 tmp = REG_SET_FIELD(tmp, INPUT_GAMMA_CONTROL, OVL_INPUT_GAMMA_MODE, 0); in dce_v10_0_crtc_load_lut()
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| HD | dce_v11_0.c | 2135 tmp = REG_SET_FIELD(tmp, INPUT_GAMMA_CONTROL, GRPH_INPUT_GAMMA_MODE, 0); in dce_v11_0_crtc_load_lut()
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