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Searched refs:I830_L2_CACHE_CLOCK_GATE_DISABLE (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_overlay.c206 val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE; in i830_overlay_clock_gating()
208 val |= I830_L2_CACHE_CLOCK_GATE_DISABLE; in i830_overlay_clock_gating()
HDi915_reg.h222 #define I830_L2_CACHE_CLOCK_GATE_DISABLE (1 << 2) macro