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Searched refs:HEVC_ENC_CMD_END (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
HDsoc15d.h401 #define HEVC_ENC_CMD_END 0x00000001 macro
HDvid.h472 #define HEVC_ENC_CMD_END 0x00000001 macro
HDuvd_v6_0.c186 amdgpu_ring_write(ring, HEVC_ENC_CMD_END); in uvd_v6_0_enc_ring_test_ring()
1114 amdgpu_ring_write(ring, HEVC_ENC_CMD_END); in uvd_v6_0_enc_ring_insert_end()
HDuvd_v7_0.c194 amdgpu_ring_write(ring, HEVC_ENC_CMD_END); in uvd_v7_0_enc_ring_test_ring()
1402 amdgpu_ring_write(ring, HEVC_ENC_CMD_END); in uvd_v7_0_enc_ring_insert_end()