Searched refs:GNLD_DPM_DCEFCLK (Results 1 – 4 of 4) sorted by relevance
52 GNLD_DPM_DCEFCLK, enumerator77 #define GNLD_DPM_MAX (GNLD_DPM_DCEFCLK + 1)
49 GNLD_DPM_DCEFCLK, enumerator73 #define GNLD_DPM_MAX (GNLD_DPM_DCEFCLK + 1)
311 data->smu_features[GNLD_DPM_DCEFCLK].smu_feature_id = in vega12_init_dpm_defaults()630 if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { in vega12_setup_default_dpm_tables()643 if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { in vega12_setup_default_dpm_tables()654 if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { in vega12_setup_default_dpm_tables()665 if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { in vega12_setup_default_dpm_tables()1354 if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { in vega12_display_clock_voltage_request()1404 if (data->smu_features[GNLD_DPM_DCEFCLK].supported) { in vega12_notify_smc_display_config_after_ps_adjustment()1692 if (!data->smu_features[GNLD_DPM_DCEFCLK].enabled) in vega12_get_dcefclocks()1784 data->smu_features[GNLD_DPM_DCEFCLK].supported && in vega12_set_watermarks_for_clocks_ranges()2115 data->smu_features[GNLD_DPM_DCEFCLK].supported && in vega12_display_configuration_changed_task()
372 data->smu_features[GNLD_DPM_DCEFCLK].smu_feature_id = in vega10_init_dpm_defaults()434 data->smu_features[GNLD_DPM_DCEFCLK].supported = true; in vega10_init_dpm_defaults()