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Searched refs:DREF_SSC_SOURCE_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_dpll_mgr.c374 enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK | in ibx_assert_pch_refclk_enabled()
HDintel_display.c7673 final &= ~DREF_SSC_SOURCE_MASK; in ironlake_init_pch_refclk()
7707 val &= ~DREF_SSC_SOURCE_MASK; in ironlake_init_pch_refclk()
7753 val &= ~DREF_SSC_SOURCE_MASK; in ironlake_init_pch_refclk()
HDi915_reg.h7275 #define DREF_SSC_SOURCE_MASK (3<<11) macro