Searched refs:DP_TRAINING_LANE0_SET (Results 1 – 5 of 5) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/core/ |
| HD | dc_link_dp.c | 216 &dpcd_lt_buffer[DP_TRAINING_LANE0_SET - dpcd_base_lt_offset], in dpcd_set_lt_pattern_and_lane_settings()
222 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings()
240 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings()
531 DP_TRAINING_LANE0_SET, in dpcd_set_lane_settings()
556 DP_TRAINING_LANE0_SET, in dpcd_set_lane_settings()
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| /dragonfly/sys/dev/drm/i915/ |
| HD | intel_dp_link_training.c | 109 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_update_link_train()
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| /dragonfly/sys/dev/drm/include/drm/ |
| HD | drm_dp_helper.h | 364 #define DP_TRAINING_LANE0_SET 0x103 macro
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| HD | atombios_dp.c | 501 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
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| /dragonfly/sys/dev/drm/radeon/ |
| HD | atombios_dp.c | 563 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
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