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Searched refs:DP5_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h38019 #define DP5_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_12_0_sh_mask.h43807 #define DP5_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro