Home
last modified time | relevance | path

Searched refs:DP0_DP_SEC_CNTL__DP_SEC_MPG_ENABLE_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h31255 #define DP0_DP_SEC_CNTL__DP_SEC_MPG_ENABLE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_12_0_sh_mask.h38145 #define DP0_DP_SEC_CNTL__DP_SEC_MPG_ENABLE_MASK … macro