Searched refs:DOMAIN1_PG_CONFIG (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| HD | dce_hwseq.h | 175 SR(DOMAIN1_PG_CONFIG), \
229 uint32_t DOMAIN1_PG_CONFIG; member
390 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
391 HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
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| /dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
| HD | dcn10_hw_sequencer.c | 373 REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on); in enable_power_gating_plane()
422 if (REG(DOMAIN1_PG_CONFIG) == 0) in dpp_pg_control()
427 REG_UPDATE(DOMAIN1_PG_CONFIG, in dpp_pg_control()
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