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Searched refs:DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h5410 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT 0x0000001c macro
HDdce_8_0_sh_mask.h6930 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT 0x1c macro
HDdce_10_0_sh_mask.h14927 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT 0x1c macro
HDdce_11_0_sh_mask.h15073 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT 0x1c macro
HDdce_11_2_sh_mask.h15737 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT 0x1c macro
HDdce_12_0_sh_mask.h7985 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h4963 #define DISP_INTERRUPT_STATUS__ABM1_HG_READY_INT__SHIFT … macro