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Searched refs:DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_8_0_sh_mask.h7370 #define DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT 0x1 macro
HDdce_10_0_sh_mask.h15387 #define DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT 0x1 macro
HDdce_11_0_sh_mask.h15533 #define DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT 0x1 macro
HDdce_11_2_sh_mask.h16197 #define DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT 0x1 macro
HDdce_12_0_sh_mask.h8475 #define DISP_INTERRUPT_STATUS_CONTINUE9__DCFE3_PERFMON_COUNTER1_INTERRUPT__SHIFT … macro