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Searched refs:DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h5403 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK 0x00003fffL macro
HDdce_8_0_sh_mask.h1613 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK 0x3fff macro
HDdce_10_0_sh_mask.h1617 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK 0x3fff macro
HDdce_11_0_sh_mask.h1565 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK 0x3fff macro
HDdce_11_2_sh_mask.h1727 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK 0x3fff macro
HDdce_12_0_sh_mask.h2627 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h1991 #define DISPCLK_FREQ_CHANGE_CNTL__DISPCLK_STEP_DELAY_MASK … macro