Home
last modified time | relevance | path

Searched refs:DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h4337 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK 0x00000040L macro
HDdce_8_0_sh_mask.h6719 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK 0x40 macro
HDdce_10_0_sh_mask.h16004 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK 0x40 macro
HDdce_11_0_sh_mask.h16222 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK 0x40 macro
HDdce_11_2_sh_mask.h16974 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK 0x40 macro
HDdce_12_0_sh_mask.h7660 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h27078 #define DC_I2C_DDC5_SETUP__DC_I2C_DDC5_ENABLE_MASK … macro