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Searched refs:DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h3769 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK 0x00f00000L macro
HDdce_8_0_sh_mask.h4123 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK 0xf00000 macro
HDdce_10_0_sh_mask.h4049 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK 0xf00000 macro
HDdce_11_0_sh_mask.h4163 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK 0xf00000 macro
HDdce_11_2_sh_mask.h4607 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK 0xf00000 macro
HDdce_12_0_sh_mask.h10559 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h41169 #define DC_GPIO_PAD_STRENGTH_2__PWRSEQ_STRENGTH_SP_MASK … macro