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Searched refs:DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h3467 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK 0x0f000000L macro
HDdce_8_0_sh_mask.h3871 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK 0xf000000 macro
HDdce_10_0_sh_mask.h3775 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK 0xf000000 macro
HDdce_11_0_sh_mask.h3863 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK 0xf000000 macro
HDdce_11_2_sh_mask.h4245 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK 0xf000000 macro
HDdce_12_0_sh_mask.h10238 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h40848 #define DC_GPIO_DDCVGA_MASK__DC_GPIO_DDCVGACLK_STR_MASK … macro