Home
last modified time | relevance | path

Searched refs:DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h3459 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK 0x00010000L macro
HDdce_8_0_sh_mask.h3865 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK 0x10000 macro
HDdce_10_0_sh_mask.h3769 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK 0x10000 macro
HDdce_11_0_sh_mask.h3857 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK 0x10000 macro
HDdce_11_2_sh_mask.h4239 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK 0x10000 macro
HDdce_12_0_sh_mask.h10235 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h40845 #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE_MASK … macro