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Searched refs:DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h3266 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT 0x00000018 macro
HDdce_8_0_sh_mask.h3670 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT 0x18 macro
HDdce_10_0_sh_mask.h3574 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT 0x18 macro
HDdce_11_0_sh_mask.h3662 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT 0x18 macro
HDdce_11_2_sh_mask.h4020 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT 0x18 macro
HDdce_12_0_sh_mask.h10001 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h40611 #define DC_GPIO_DDC1_MASK__DC_GPIO_DDC1CLK_STR__SHIFT … macro