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Searched refs:DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_sh_mask.h15459 #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9 macro
HDdce_11_0_sh_mask.h15613 #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9 macro
HDdce_11_2_sh_mask.h16295 #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9 macro
HDdce_12_0_sh_mask.h8541 #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT … macro