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Searched refs:DCO_MEM_PWR_STATUS__DPE_MEM_PWR_STATE_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_sh_mask.h15454 #define DCO_MEM_PWR_STATUS__DPE_MEM_PWR_STATE_MASK 0x80 macro
HDdce_11_0_sh_mask.h15608 #define DCO_MEM_PWR_STATUS__DPE_MEM_PWR_STATE_MASK 0x80 macro
HDdce_11_2_sh_mask.h16290 #define DCO_MEM_PWR_STATUS__DPE_MEM_PWR_STATE_MASK 0x80 macro
HDdce_12_0_sh_mask.h8555 #define DCO_MEM_PWR_STATUS__DPE_MEM_PWR_STATE_MASK … macro