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Searched refs:DCO_MEM_PWR_CTRL__HDMI1_MEM_PWR_DIS__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_sh_mask.h15503 #define DCO_MEM_PWR_CTRL__HDMI1_MEM_PWR_DIS__SHIFT 0x10 macro
HDdce_11_0_sh_mask.h15663 #define DCO_MEM_PWR_CTRL__HDMI1_MEM_PWR_DIS__SHIFT 0x10 macro
HDdce_11_2_sh_mask.h16345 #define DCO_MEM_PWR_CTRL__HDMI1_MEM_PWR_DIS__SHIFT 0x10 macro
HDdce_12_0_sh_mask.h8579 #define DCO_MEM_PWR_CTRL__HDMI1_MEM_PWR_DIS__SHIFT … macro