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Searched refs:DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h4561 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK 0x00200000L macro
HDdce_8_0_sh_mask.h2571 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK 0x200000 macro
HDdce_10_0_sh_mask.h2439 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK 0x200000 macro
HDdce_11_0_sh_mask.h2387 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK 0x200000 macro
HDdce_11_2_sh_mask.h2609 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK 0x200000 macro
HDdce_12_0_sh_mask.h3828 #define DCI_CLK_CNTL__DISPCLK_G_DMIF5_GATE_DIS_MASK … macro