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Searched refs:DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h3561 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT 0x0000000a macro
HDgfx_7_2_sh_mask.h3834 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT 0xa macro
HDgfx_8_1_sh_mask.h5084 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT 0xa macro
HDgfx_8_0_sh_mask.h4560 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT 0xa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h22142 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT … macro
HDgc_9_2_1_sh_mask.h23573 #define DB_PERFCOUNTER1_SELECT1__PERF_SEL3__SHIFT … macro