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Searched refs:DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h3487 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT 0x0000000a macro
HDgfx_7_2_sh_mask.h4074 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT 0xa macro
HDgfx_8_1_sh_mask.h5332 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT 0xa macro
HDgfx_8_0_sh_mask.h4802 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT 0xa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h5095 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT … macro
HDgc_9_2_1_sh_mask.h4501 #define DB_FIFO_DEPTH1__MCC_DEPTH__SHIFT … macro