Home
last modified time | relevance | path

Searched refs:DB_COUNT_CONTROL__SFAIL_ENABLE_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h3230 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK 0x000f0000L macro
HDgfx_7_2_sh_mask.h3543 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK 0xf0000 macro
HDgfx_8_1_sh_mask.h4789 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK 0xf0000 macro
HDgfx_8_0_sh_mask.h4267 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK 0xf0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h14250 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK … macro
HDgc_9_2_1_sh_mask.h15544 #define DB_COUNT_CONTROL__SFAIL_ENABLE_MASK … macro