1 /* $FreeBSD: src/sys/dev/isp/ispmbox.h,v 1.64 2010/02/27 05:41:23 mjacob Exp $ */ 2 /*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33 #ifndef _ISPMBOX_H 34 #define _ISPMBOX_H 35 36 /* 37 * Mailbox Command Opcodes 38 */ 39 #define MBOX_NO_OP 0x0000 40 #define MBOX_LOAD_RAM 0x0001 41 #define MBOX_EXEC_FIRMWARE 0x0002 42 #define MBOX_DUMP_RAM 0x0003 43 #define MBOX_WRITE_RAM_WORD 0x0004 44 #define MBOX_READ_RAM_WORD 0x0005 45 #define MBOX_MAILBOX_REG_TEST 0x0006 46 #define MBOX_VERIFY_CHECKSUM 0x0007 47 #define MBOX_ABOUT_FIRMWARE 0x0008 48 #define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50 #define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53 #define MBOX_CHECK_FIRMWARE 0x000e 54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55 #define MBOX_INIT_REQ_QUEUE 0x0010 56 #define MBOX_INIT_RES_QUEUE 0x0011 57 #define MBOX_EXECUTE_IOCB 0x0012 58 #define MBOX_WAKE_UP 0x0013 59 #define MBOX_STOP_FIRMWARE 0x0014 60 #define MBOX_ABORT 0x0015 61 #define MBOX_ABORT_DEVICE 0x0016 62 #define MBOX_ABORT_TARGET 0x0017 63 #define MBOX_BUS_RESET 0x0018 64 #define MBOX_STOP_QUEUE 0x0019 65 #define MBOX_START_QUEUE 0x001a 66 #define MBOX_SINGLE_STEP_QUEUE 0x001b 67 #define MBOX_ABORT_QUEUE 0x001c 68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70 #define MBOX_GET_FIRMWARE_STATUS 0x001f 71 #define MBOX_GET_INIT_SCSI_ID 0x0020 72 #define MBOX_GET_SELECT_TIMEOUT 0x0021 73 #define MBOX_GET_RETRY_COUNT 0x0022 74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 75 #define MBOX_GET_CLOCK_RATE 0x0024 76 #define MBOX_GET_ACT_NEG_STATE 0x0025 77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78 #define MBOX_GET_SBUS_PARAMS 0x0027 79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80 #define MBOX_GET_TARGET_PARAMS 0x0028 81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88 #define MBOX_SET_INIT_SCSI_ID 0x0030 89 #define MBOX_SET_SELECT_TIMEOUT 0x0031 90 #define MBOX_SET_RETRY_COUNT 0x0032 91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 92 #define MBOX_SET_CLOCK_RATE 0x0034 93 #define MBOX_SET_ACT_NEG_STATE 0x0035 94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96 #define MBOX_SET_PCI_PARAMETERS 0x0037 97 #define MBOX_SET_TARGET_PARAMS 0x0038 98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107 #define MBOX_EXEC_BIOS_IOCB 0x0042 108 #define MBOX_SET_FW_FEATURES 0x004a 109 #define MBOX_GET_FW_FEATURES 0x004b 110 #define FW_FEATURE_FAST_POST 0x1 111 #define FW_FEATURE_LVD_NOTIFY 0x2 112 #define FW_FEATURE_RIO_32BIT 0x4 113 #define FW_FEATURE_RIO_16BIT 0x8 114 115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 116 #define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118 #define MBOX_ENABLE_TARGET_MODE 0x0055 119 #define ENABLE_TARGET_FLAG 0x8000 120 #define ENABLE_TQING_FLAG 0x0004 121 #define ENABLE_MANDATORY_DISC 0x0002 122 #define MBOX_GET_TARGET_STATUS 0x0056 123 124 /* These are for the ISP2X00 FC cards */ 125 #define MBOX_GET_LOOP_ID 0x0020 126 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127 #define ISP24XX_INORDER 0x0100 128 #define ISP24XX_NPIV_SAN 0x0400 129 #define ISP24XX_VSAN_SAN 0x1000 130 #define ISP24XX_FC_SP_SAN 0x2000 131 132 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134 #define MBOX_GET_RESOURCE_COUNT 0x0042 135 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 136 #define MBOX_ENHANCED_GET_PDB 0x0047 137 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141 #define MBOX_INIT_FIRMWARE 0x0060 142 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143 #define MBOX_INIT_LIP 0x0062 144 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145 #define MBOX_GET_PORT_DB 0x0064 146 #define MBOX_CLEAR_ACA 0x0065 147 #define MBOX_TARGET_RESET 0x0066 148 #define MBOX_CLEAR_TASK_SET 0x0067 149 #define MBOX_ABORT_TASK_SET 0x0068 150 #define MBOX_GET_FW_STATE 0x0069 151 #define MBOX_GET_PORT_NAME 0x006A 152 #define MBOX_GET_LINK_STATUS 0x006B 153 #define MBOX_INIT_LIP_RESET 0x006C 154 #define MBOX_SEND_SNS 0x006E 155 #define MBOX_FABRIC_LOGIN 0x006F 156 #define MBOX_SEND_CHANGE_REQUEST 0x0070 157 #define MBOX_FABRIC_LOGOUT 0x0071 158 #define MBOX_INIT_LIP_LOGIN 0x0072 159 #define MBOX_LUN_RESET 0x007E 160 161 #define MBOX_DRIVER_HEARTBEAT 0x005B 162 #define MBOX_FW_HEARTBEAT 0x005C 163 164 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165 #define MBGSD_GET_RATE 0 166 #define MBGSD_SET_RATE 1 167 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168 #define MBGSD_ONEGB 0 169 #define MBGSD_TWOGB 1 170 #define MBGSD_AUTO 2 171 #define MBGSD_FOURGB 3 /* 24XX only */ 172 #define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175 #define ISP2100_SET_PCI_PARAM 0x00ff 176 177 #define MBOX_BUSY 0x04 178 179 /* 180 * Mailbox Command Complete Status Codes 181 */ 182 #define MBOX_COMMAND_COMPLETE 0x4000 183 #define MBOX_INVALID_COMMAND 0x4001 184 #define MBOX_HOST_INTERFACE_ERROR 0x4002 185 #define MBOX_TEST_FAILED 0x4003 186 #define MBOX_COMMAND_ERROR 0x4005 187 #define MBOX_COMMAND_PARAM_ERROR 0x4006 188 #define MBOX_PORT_ID_USED 0x4007 189 #define MBOX_LOOP_ID_USED 0x4008 190 #define MBOX_ALL_IDS_USED 0x4009 191 #define MBOX_NOT_LOGGED_IN 0x400A 192 /* pseudo mailbox completion codes */ 193 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196 #define MBLOGALL 0x000f 197 #define MBLOGNONE 0x0000 198 #define MBLOGMASK(x) ((x) & 0xf) 199 200 /* 201 * Asynchronous event status codes 202 */ 203 #define ASYNC_BUS_RESET 0x8001 204 #define ASYNC_SYSTEM_ERROR 0x8002 205 #define ASYNC_RQS_XFER_ERR 0x8003 206 #define ASYNC_RSP_XFER_ERR 0x8004 207 #define ASYNC_QWAKEUP 0x8005 208 #define ASYNC_TIMEOUT_RESET 0x8006 209 #define ASYNC_DEVICE_RESET 0x8007 210 #define ASYNC_EXTMSG_UNDERRUN 0x800A 211 #define ASYNC_SCAM_INT 0x800B 212 #define ASYNC_HUNG_SCSI 0x800C 213 #define ASYNC_KILLED_BUS 0x800D 214 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215 #define ASYNC_LIP_OCCURRED 0x8010 216 #define ASYNC_LOOP_UP 0x8011 217 #define ASYNC_LOOP_DOWN 0x8012 218 #define ASYNC_LOOP_RESET 0x8013 219 #define ASYNC_PDB_CHANGED 0x8014 220 #define ASYNC_CHANGE_NOTIFY 0x8015 221 #define ASYNC_LIP_F8 0x8016 222 #define ASYNC_LIP_ERROR 0x8017 223 #define ASYNC_SECURITY_UPDATE 0x801B 224 #define ASYNC_CMD_CMPLT 0x8020 225 #define ASYNC_CTIO_DONE 0x8021 226 #define ASYNC_RIO32_1 0x8021 227 #define ASYNC_RIO32_2 0x8022 228 #define ASYNC_IP_XMIT_DONE 0x8022 229 #define ASYNC_IP_RECV_DONE 0x8023 230 #define ASYNC_IP_BROADCAST 0x8024 231 #define ASYNC_IP_RCVQ_LOW 0x8025 232 #define ASYNC_IP_RCVQ_EMPTY 0x8026 233 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 234 #define ASYNC_PTPMODE 0x8030 235 #define ASYNC_RIO16_1 0x8031 236 #define ASYNC_RIO16_2 0x8032 237 #define ASYNC_RIO16_3 0x8033 238 #define ASYNC_RIO16_4 0x8034 239 #define ASYNC_RIO16_5 0x8035 240 #define ASYNC_CONNMODE 0x8036 241 #define ISP_CONN_LOOP 1 242 #define ISP_CONN_PTP 2 243 #define ISP_CONN_BADLIP 3 244 #define ISP_CONN_FATAL 4 245 #define ISP_CONN_LOOPBACK 5 246 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 247 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 248 #define ASYNC_RCV_ERR 0x8048 249 250 /* 251 * Firmware Options. There are a lot of them. 252 * 253 * IFCOPTN - ISP Fibre Channel Option Word N 254 */ 255 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 256 #define IFCOPT1_EAABSRCVD (1 << 12) 257 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 258 #define IFCOPT1_ENAPURE (1 << 10) 259 #define IFCOPT1_ENA8017 (1 << 7) 260 #define IFCOPT1_DISGPIO67 (1 << 6) 261 #define IFCOPT1_LIPLOSSIMM (1 << 5) 262 #define IFCOPT1_DISF7SWTCH (1 << 4) 263 #define IFCOPT1_CTIO_RETRY (1 << 3) 264 #define IFCOPT1_LIPASYNC (1 << 1) 265 #define IFCOPT1_LIPF8 (1 << 0) 266 267 #define IFCOPT2_LOOPBACK (1 << 1) 268 #define IFCOPT2_ATIO3_ONLY (1 << 0) 269 270 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 271 #define IFCOPT3_RNDASYNC (1 << 1) 272 /* 273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 274 * mailbox command to enable this. 275 */ 276 #define ASYNC_QFULL_SENT 0x8049 277 278 /* 279 * Needs to be enabled 280 */ 281 #define ASYNC_AUTO_PLOGI_RJT 0x8018 282 /* 283 * 24XX only 284 */ 285 #define ASYNC_RJT_SENT 0x8049 286 287 /* 288 * All IOCB Queue entries are this size 289 */ 290 #define QENTRY_LEN 64 291 292 /* 293 * Command Structure Definitions 294 */ 295 296 typedef struct { 297 uint32_t ds_base; 298 uint32_t ds_count; 299 } ispds_t; 300 301 typedef struct { 302 uint32_t ds_base; 303 uint32_t ds_basehi; 304 uint32_t ds_count; 305 } ispds64_t; 306 307 #define DSTYPE_32BIT 0 308 #define DSTYPE_64BIT 1 309 typedef struct { 310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 311 uint32_t ds_segment; /* unused */ 312 uint32_t ds_base; /* 32 bit address of DSD list */ 313 } ispdslist_t; 314 315 316 typedef struct { 317 uint8_t rqs_entry_type; 318 uint8_t rqs_entry_count; 319 uint8_t rqs_seqno; 320 uint8_t rqs_flags; 321 } isphdr_t; 322 323 /* RQS Flag definitions */ 324 #define RQSFLAG_CONTINUATION 0x01 325 #define RQSFLAG_FULL 0x02 326 #define RQSFLAG_BADHEADER 0x04 327 #define RQSFLAG_BADPACKET 0x08 328 #define RQSFLAG_BADCOUNT 0x10 329 #define RQSFLAG_BADORDER 0x20 330 #define RQSFLAG_MASK 0x3f 331 332 /* RQS entry_type definitions */ 333 #define RQSTYPE_REQUEST 0x01 334 #define RQSTYPE_DATASEG 0x02 335 #define RQSTYPE_RESPONSE 0x03 336 #define RQSTYPE_MARKER 0x04 337 #define RQSTYPE_CMDONLY 0x05 338 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 339 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 340 #define RQSTYPE_SCAM 0x08 341 #define RQSTYPE_A64 0x09 342 #define RQSTYPE_A64_CONT 0x0a 343 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 344 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 345 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 346 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 347 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 348 #define RQSTYPE_STATUS_CONT 0x10 349 #define RQSTYPE_T2RQS 0x11 350 #define RQSTYPE_CTIO7 0x12 351 #define RQSTYPE_IP_XMIT 0x13 352 #define RQSTYPE_TSK_MGMT 0x14 353 #define RQSTYPE_T4RQS 0x15 354 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 355 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 356 #define RQSTYPE_T7RQS 0x18 357 #define RQSTYPE_T3RQS 0x19 358 #define RQSTYPE_IP_XMIT_64 0x1b 359 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 360 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 361 #define RQSTYPE_RIO1 0x21 362 #define RQSTYPE_RIO2 0x22 363 #define RQSTYPE_IP_RECV 0x23 364 #define RQSTYPE_IP_RECV_CONT 0x24 365 #define RQSTYPE_CT_PASSTHRU 0x29 366 #define RQSTYPE_MS_PASSTHRU 0x29 367 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 368 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 369 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 370 #define RQSTYPE_ABORT_IO 0x33 371 #define RQSTYPE_T6RQS 0x48 372 #define RQSTYPE_LOGIN 0x52 373 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 374 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 375 376 377 #define ISP_RQDSEG 4 378 typedef struct { 379 isphdr_t req_header; 380 uint32_t req_handle; 381 uint8_t req_lun_trn; 382 uint8_t req_target; 383 uint16_t req_cdblen; 384 uint16_t req_flags; 385 uint16_t req_reserved; 386 uint16_t req_time; 387 uint16_t req_seg_count; 388 uint8_t req_cdb[12]; 389 ispds_t req_dataseg[ISP_RQDSEG]; 390 } ispreq_t; 391 #define ISP_RQDSEG_A64 2 392 393 typedef struct { 394 isphdr_t mrk_header; 395 uint32_t mrk_handle; 396 uint8_t mrk_reserved0; 397 uint8_t mrk_target; 398 uint16_t mrk_modifier; 399 uint16_t mrk_flags; 400 uint16_t mrk_lun; 401 uint8_t mrk_reserved1[48]; 402 } isp_marker_t; 403 404 typedef struct { 405 isphdr_t mrk_header; 406 uint32_t mrk_handle; 407 uint16_t mrk_nphdl; 408 uint8_t mrk_modifier; 409 uint8_t mrk_reserved0; 410 uint8_t mrk_reserved1; 411 uint8_t mrk_vphdl; 412 uint16_t mrk_reserved2; 413 uint8_t mrk_lun[8]; 414 uint8_t mrk_reserved3[40]; 415 } isp_marker_24xx_t; 416 417 418 #define SYNC_DEVICE 0 419 #define SYNC_TARGET 1 420 #define SYNC_ALL 2 421 #define SYNC_LIP 3 422 423 #define ISP_RQDSEG_T2 3 424 typedef struct { 425 isphdr_t req_header; 426 uint32_t req_handle; 427 uint8_t req_lun_trn; 428 uint8_t req_target; 429 uint16_t req_scclun; 430 uint16_t req_flags; 431 uint16_t req_reserved; 432 uint16_t req_time; 433 uint16_t req_seg_count; 434 uint8_t req_cdb[16]; 435 uint32_t req_totalcnt; 436 ispds_t req_dataseg[ISP_RQDSEG_T2]; 437 } ispreqt2_t; 438 439 typedef struct { 440 isphdr_t req_header; 441 uint32_t req_handle; 442 uint16_t req_target; 443 uint16_t req_scclun; 444 uint16_t req_flags; 445 uint16_t req_reserved; 446 uint16_t req_time; 447 uint16_t req_seg_count; 448 uint8_t req_cdb[16]; 449 uint32_t req_totalcnt; 450 ispds_t req_dataseg[ISP_RQDSEG_T2]; 451 } ispreqt2e_t; 452 453 #define ISP_RQDSEG_T3 2 454 typedef struct { 455 isphdr_t req_header; 456 uint32_t req_handle; 457 uint8_t req_lun_trn; 458 uint8_t req_target; 459 uint16_t req_scclun; 460 uint16_t req_flags; 461 uint16_t req_reserved; 462 uint16_t req_time; 463 uint16_t req_seg_count; 464 uint8_t req_cdb[16]; 465 uint32_t req_totalcnt; 466 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 467 } ispreqt3_t; 468 #define ispreq64_t ispreqt3_t /* same as.... */ 469 470 typedef struct { 471 isphdr_t req_header; 472 uint32_t req_handle; 473 uint16_t req_target; 474 uint16_t req_scclun; 475 uint16_t req_flags; 476 uint16_t req_reserved; 477 uint16_t req_time; 478 uint16_t req_seg_count; 479 uint8_t req_cdb[16]; 480 uint32_t req_totalcnt; 481 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 482 } ispreqt3e_t; 483 484 /* req_flag values */ 485 #define REQFLAG_NODISCON 0x0001 486 #define REQFLAG_HTAG 0x0002 487 #define REQFLAG_OTAG 0x0004 488 #define REQFLAG_STAG 0x0008 489 #define REQFLAG_TARGET_RTN 0x0010 490 491 #define REQFLAG_NODATA 0x0000 492 #define REQFLAG_DATA_IN 0x0020 493 #define REQFLAG_DATA_OUT 0x0040 494 #define REQFLAG_DATA_UNKNOWN 0x0060 495 496 #define REQFLAG_DISARQ 0x0100 497 #define REQFLAG_FRC_ASYNC 0x0200 498 #define REQFLAG_FRC_SYNC 0x0400 499 #define REQFLAG_FRC_WIDE 0x0800 500 #define REQFLAG_NOPARITY 0x1000 501 #define REQFLAG_STOPQ 0x2000 502 #define REQFLAG_XTRASNS 0x4000 503 #define REQFLAG_PRIORITY 0x8000 504 505 typedef struct { 506 isphdr_t req_header; 507 uint32_t req_handle; 508 uint8_t req_lun_trn; 509 uint8_t req_target; 510 uint16_t req_cdblen; 511 uint16_t req_flags; 512 uint16_t req_reserved; 513 uint16_t req_time; 514 uint16_t req_seg_count; 515 uint8_t req_cdb[44]; 516 } ispextreq_t; 517 518 /* 24XX only */ 519 typedef struct { 520 uint16_t fcd_length; 521 uint16_t fcd_a1500; 522 uint16_t fcd_a3116; 523 uint16_t fcd_a4732; 524 uint16_t fcd_a6348; 525 } fcp_cmnd_ds_t; 526 527 typedef struct { 528 isphdr_t req_header; 529 uint32_t req_handle; 530 uint16_t req_nphdl; 531 uint16_t req_time; 532 uint16_t req_seg_count; 533 uint16_t req_fc_rsp_dsd_length; 534 uint8_t req_lun[8]; 535 uint16_t req_flags; 536 uint16_t req_fc_cmnd_dsd_length; 537 uint16_t req_fc_cmnd_dsd_a1500; 538 uint16_t req_fc_cmnd_dsd_a3116; 539 uint16_t req_fc_cmnd_dsd_a4732; 540 uint16_t req_fc_cmnd_dsd_a6348; 541 uint16_t req_fc_rsp_dsd_a1500; 542 uint16_t req_fc_rsp_dsd_a3116; 543 uint16_t req_fc_rsp_dsd_a4732; 544 uint16_t req_fc_rsp_dsd_a6348; 545 uint32_t req_totalcnt; 546 uint16_t req_tidlo; 547 uint8_t req_tidhi; 548 uint8_t req_vpidx; 549 ispds64_t req_dataseg; 550 } ispreqt6_t; 551 552 typedef struct { 553 isphdr_t req_header; 554 uint32_t req_handle; 555 uint16_t req_nphdl; 556 uint16_t req_time; 557 uint16_t req_seg_count; 558 uint16_t req_reserved; 559 uint8_t req_lun[8]; 560 uint8_t req_alen_datadir; 561 uint8_t req_task_management; 562 uint8_t req_task_attribute; 563 uint8_t req_crn; 564 uint8_t req_cdb[16]; 565 uint32_t req_dl; 566 uint16_t req_tidlo; 567 uint8_t req_tidhi; 568 uint8_t req_vpidx; 569 ispds64_t req_dataseg; 570 } ispreqt7_t; 571 572 /* Task Management Request Function */ 573 typedef struct { 574 isphdr_t tmf_header; 575 uint32_t tmf_handle; 576 uint16_t tmf_nphdl; 577 uint8_t tmf_reserved0[2]; 578 uint16_t tmf_delay; 579 uint16_t tmf_timeout; 580 uint8_t tmf_lun[8]; 581 uint32_t tmf_flags; 582 uint8_t tmf_reserved1[20]; 583 uint16_t tmf_tidlo; 584 uint8_t tmf_tidhi; 585 uint8_t tmf_vpidx; 586 uint8_t tmf_reserved2[12]; 587 } isp24xx_tmf_t; 588 589 #define ISP24XX_TMF_NOSEND 0x80000000 590 591 #define ISP24XX_TMF_LUN_RESET 0x00000010 592 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 593 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 594 #define ISP24XX_TMF_TARGET_RESET 0x00000002 595 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 596 597 /* I/O Abort Structure */ 598 typedef struct { 599 isphdr_t abrt_header; 600 uint32_t abrt_handle; 601 uint16_t abrt_nphdl; 602 uint16_t abrt_options; 603 uint32_t abrt_cmd_handle; 604 uint8_t abrt_reserved[32]; 605 uint16_t abrt_tidlo; 606 uint8_t abrt_tidhi; 607 uint8_t abrt_vpidx; 608 uint8_t abrt_reserved1[12]; 609 } isp24xx_abrt_t; 610 611 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 612 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 613 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 614 615 #define ISP_CDSEG 7 616 typedef struct { 617 isphdr_t req_header; 618 uint32_t req_reserved; 619 ispds_t req_dataseg[ISP_CDSEG]; 620 } ispcontreq_t; 621 622 #define ISP_CDSEG64 5 623 typedef struct { 624 isphdr_t req_header; 625 ispds64_t req_dataseg[ISP_CDSEG64]; 626 } ispcontreq64_t; 627 628 typedef struct { 629 isphdr_t req_header; 630 uint32_t req_handle; 631 uint16_t req_scsi_status; 632 uint16_t req_completion_status; 633 uint16_t req_state_flags; 634 uint16_t req_status_flags; 635 uint16_t req_time; 636 #define req_response_len req_time /* FC only */ 637 uint16_t req_sense_len; 638 uint32_t req_resid; 639 uint8_t req_response[8]; /* FC only */ 640 uint8_t req_sense_data[32]; 641 } ispstatusreq_t; 642 643 /* 644 * Status Continuation 645 */ 646 typedef struct { 647 isphdr_t req_header; 648 uint8_t req_sense_data[60]; 649 } ispstatus_cont_t; 650 651 /* 652 * 24XX Type 0 status 653 */ 654 typedef struct { 655 isphdr_t req_header; 656 uint32_t req_handle; 657 uint16_t req_completion_status; 658 uint16_t req_oxid; 659 uint32_t req_resid; 660 uint16_t req_reserved0; 661 uint16_t req_state_flags; 662 uint16_t req_reserved1; 663 uint16_t req_scsi_status; 664 uint32_t req_fcp_residual; 665 uint32_t req_sense_len; 666 uint32_t req_response_len; 667 uint8_t req_rsp_sense[28]; 668 } isp24xx_statusreq_t; 669 670 /* 671 * For Qlogic 2X00, the high order byte of SCSI status has 672 * additional meaning. 673 */ 674 #define RQCS_RU 0x800 /* Residual Under */ 675 #define RQCS_RO 0x400 /* Residual Over */ 676 #define RQCS_RESID (RQCS_RU|RQCS_RO) 677 #define RQCS_SV 0x200 /* Sense Length Valid */ 678 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 679 680 /* 681 * CT Passthru IOCB 682 */ 683 typedef struct { 684 isphdr_t ctp_header; 685 uint32_t ctp_handle; 686 uint16_t ctp_status; 687 uint16_t ctp_nphdl; /* n-port handle */ 688 uint16_t ctp_cmd_cnt; /* Command DSD count */ 689 uint8_t ctp_vpidx; 690 uint8_t ctp_reserved0; 691 uint16_t ctp_time; 692 uint16_t ctp_reserved1; 693 uint16_t ctp_rsp_cnt; /* Response DSD count */ 694 uint16_t ctp_reserved2[5]; 695 uint32_t ctp_rsp_bcnt; /* Response byte count */ 696 uint32_t ctp_cmd_bcnt; /* Command byte count */ 697 ispds64_t ctp_dataseg[2]; 698 } isp_ct_pt_t; 699 700 /* 701 * MS Passthru IOCB 702 */ 703 typedef struct { 704 isphdr_t ms_header; 705 uint32_t ms_handle; 706 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 707 uint16_t ms_status; 708 uint16_t ms_flags; 709 uint16_t ms_reserved1; /* low 8 bits */ 710 uint16_t ms_time; 711 uint16_t ms_cmd_cnt; /* Command DSD count */ 712 uint16_t ms_tot_cnt; /* Total DSD Count */ 713 uint8_t ms_type; /* MS type */ 714 uint8_t ms_r_ctl; /* R_CTL */ 715 uint16_t ms_rxid; /* RX_ID */ 716 uint16_t ms_reserved2; 717 uint32_t ms_handle2; 718 uint32_t ms_rsp_bcnt; /* Response byte count */ 719 uint32_t ms_cmd_bcnt; /* Command byte count */ 720 ispds64_t ms_dataseg[2]; 721 } isp_ms_t; 722 723 /* 724 * Completion Status Codes. 725 */ 726 #define RQCS_COMPLETE 0x0000 727 #define RQCS_DMA_ERROR 0x0002 728 #define RQCS_RESET_OCCURRED 0x0004 729 #define RQCS_ABORTED 0x0005 730 #define RQCS_TIMEOUT 0x0006 731 #define RQCS_DATA_OVERRUN 0x0007 732 #define RQCS_DATA_UNDERRUN 0x0015 733 #define RQCS_QUEUE_FULL 0x001C 734 735 /* 1X00 Only Completion Codes */ 736 #define RQCS_INCOMPLETE 0x0001 737 #define RQCS_TRANSPORT_ERROR 0x0003 738 #define RQCS_COMMAND_OVERRUN 0x0008 739 #define RQCS_STATUS_OVERRUN 0x0009 740 #define RQCS_BAD_MESSAGE 0x000a 741 #define RQCS_NO_MESSAGE_OUT 0x000b 742 #define RQCS_EXT_ID_FAILED 0x000c 743 #define RQCS_IDE_MSG_FAILED 0x000d 744 #define RQCS_ABORT_MSG_FAILED 0x000e 745 #define RQCS_REJECT_MSG_FAILED 0x000f 746 #define RQCS_NOP_MSG_FAILED 0x0010 747 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 748 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 749 #define RQCS_ID_MSG_FAILED 0x0013 750 #define RQCS_UNEXP_BUS_FREE 0x0014 751 #define RQCS_XACT_ERR1 0x0018 752 #define RQCS_XACT_ERR2 0x0019 753 #define RQCS_XACT_ERR3 0x001A 754 #define RQCS_BAD_ENTRY 0x001B 755 #define RQCS_PHASE_SKIPPED 0x001D 756 #define RQCS_ARQS_FAILED 0x001E 757 #define RQCS_WIDE_FAILED 0x001F 758 #define RQCS_SYNCXFER_FAILED 0x0020 759 #define RQCS_LVD_BUSERR 0x0021 760 761 /* 2X00 Only Completion Codes */ 762 #define RQCS_PORT_UNAVAILABLE 0x0028 763 #define RQCS_PORT_LOGGED_OUT 0x0029 764 #define RQCS_PORT_CHANGED 0x002A 765 #define RQCS_PORT_BUSY 0x002B 766 767 /* 24XX Only Completion Codes */ 768 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 769 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 770 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 771 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 772 773 774 /* 775 * 1X00 specific State Flags 776 */ 777 #define RQSF_GOT_BUS 0x0100 778 #define RQSF_GOT_TARGET 0x0200 779 #define RQSF_SENT_CDB 0x0400 780 #define RQSF_XFRD_DATA 0x0800 781 #define RQSF_GOT_STATUS 0x1000 782 #define RQSF_GOT_SENSE 0x2000 783 #define RQSF_XFER_COMPLETE 0x4000 784 785 /* 786 * 2X00 specific State Flags 787 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 788 */ 789 #define RQSF_DATA_IN 0x0020 790 #define RQSF_DATA_OUT 0x0040 791 #define RQSF_STAG 0x0008 792 #define RQSF_OTAG 0x0004 793 #define RQSF_HTAG 0x0002 794 /* 795 * 1X00 Status Flags 796 */ 797 #define RQSTF_DISCONNECT 0x0001 798 #define RQSTF_SYNCHRONOUS 0x0002 799 #define RQSTF_PARITY_ERROR 0x0004 800 #define RQSTF_BUS_RESET 0x0008 801 #define RQSTF_DEVICE_RESET 0x0010 802 #define RQSTF_ABORTED 0x0020 803 #define RQSTF_TIMEOUT 0x0040 804 #define RQSTF_NEGOTIATION 0x0080 805 806 /* 807 * 2X00 specific state flags 808 */ 809 /* RQSF_SENT_CDB */ 810 /* RQSF_XFRD_DATA */ 811 /* RQSF_GOT_STATUS */ 812 /* RQSF_XFER_COMPLETE */ 813 814 /* 815 * 2X00 specific status flags 816 */ 817 /* RQSTF_ABORTED */ 818 /* RQSTF_TIMEOUT */ 819 #define RQSTF_DMA_ERROR 0x0080 820 #define RQSTF_LOGOUT 0x2000 821 822 /* 823 * Miscellaneous 824 */ 825 #ifndef ISP_EXEC_THROTTLE 826 #define ISP_EXEC_THROTTLE 16 827 #endif 828 829 /* 830 * About Firmware returns an 'attribute' word in mailbox 6. 831 * These attributes are for 2200 and 2300. 832 */ 833 #define ISP_FW_ATTR_TMODE 0x0001 834 #define ISP_FW_ATTR_SCCLUN 0x0002 835 #define ISP_FW_ATTR_FABRIC 0x0004 836 #define ISP_FW_ATTR_CLASS2 0x0008 837 #define ISP_FW_ATTR_FCTAPE 0x0010 838 #define ISP_FW_ATTR_IP 0x0020 839 #define ISP_FW_ATTR_VI 0x0040 840 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 841 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 842 843 /* and these are for the 2400 */ 844 #define ISP2400_FW_ATTR_CLASS2 0x0001 845 #define ISP2400_FW_ATTR_IP 0x0002 846 #define ISP2400_FW_ATTR_MULTIID 0x0004 847 #define ISP2400_FW_ATTR_SB2 0x0008 848 #define ISP2400_FW_ATTR_T10CRC 0x0010 849 #define ISP2400_FW_ATTR_VI 0x0020 850 #define ISP2400_FW_ATTR_EXPFW 0x2000 851 852 #define ISP_CAP_TMODE(isp) \ 853 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 854 #define ISP_CAP_SCCFW(isp) \ 855 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 856 #define ISP_CAP_2KLOGIN(isp) \ 857 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 858 #define ISP_CAP_MULTI_ID(isp) \ 859 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 860 861 #define ISP_GET_VPIDX(isp, tag) \ 862 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 863 864 /* 865 * Reduced Interrupt Operation Response Queue Entries 866 */ 867 868 typedef struct { 869 isphdr_t req_header; 870 uint32_t req_handles[15]; 871 } isp_rio1_t; 872 873 typedef struct { 874 isphdr_t req_header; 875 uint16_t req_handles[30]; 876 } isp_rio2_t; 877 878 /* 879 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 880 */ 881 882 /* 883 * Initialization Control Block 884 * 885 * Version One (prime) format. 886 */ 887 typedef struct { 888 uint8_t icb_version; 889 uint8_t icb_reserved0; 890 uint16_t icb_fwoptions; 891 uint16_t icb_maxfrmlen; 892 uint16_t icb_maxalloc; 893 uint16_t icb_execthrottle; 894 uint8_t icb_retry_count; 895 uint8_t icb_retry_delay; 896 uint8_t icb_portname[8]; 897 uint16_t icb_hardaddr; 898 uint8_t icb_iqdevtype; 899 uint8_t icb_logintime; 900 uint8_t icb_nodename[8]; 901 uint16_t icb_rqstout; 902 uint16_t icb_rspnsin; 903 uint16_t icb_rqstqlen; 904 uint16_t icb_rsltqlen; 905 uint16_t icb_rqstaddr[4]; 906 uint16_t icb_respaddr[4]; 907 uint16_t icb_lunenables; 908 uint8_t icb_ccnt; 909 uint8_t icb_icnt; 910 uint16_t icb_lunetimeout; 911 uint16_t icb_reserved1; 912 uint16_t icb_xfwoptions; 913 uint8_t icb_racctimer; 914 uint8_t icb_idelaytimer; 915 uint16_t icb_zfwoptions; 916 uint16_t icb_reserved2[13]; 917 } isp_icb_t; 918 919 #define ICB_VERSION1 1 920 921 #define ICBOPT_EXTENDED 0x8000 922 #define ICBOPT_BOTH_WWNS 0x4000 923 #define ICBOPT_FULL_LOGIN 0x2000 924 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 925 #define ICBOPT_PREVLOOP 0x0800 926 #define ICBOPT_SRCHDOWN 0x0400 927 #define ICBOPT_NOLIP 0x0200 928 #define ICBOPT_PDBCHANGE_AE 0x0100 929 #define ICBOPT_INI_TGTTYPE 0x0080 930 #define ICBOPT_INI_ADISC 0x0040 931 #define ICBOPT_INI_DISABLE 0x0020 932 #define ICBOPT_TGT_ENABLE 0x0010 933 #define ICBOPT_FAST_POST 0x0008 934 #define ICBOPT_FULL_DUPLEX 0x0004 935 #define ICBOPT_FAIRNESS 0x0002 936 #define ICBOPT_HARD_ADDRESS 0x0001 937 938 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 939 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 940 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 941 #define ICBXOPT_FCTAPE 0x1000 942 #define ICBXOPT_CLASS2_ACK0 0x0200 943 #define ICBXOPT_CLASS2 0x0100 944 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 945 #define ICBXOPT_TOPO_MASK 0x0070 946 #define ICBXOPT_LOOP_ONLY 0x0000 947 #define ICBXOPT_PTP_ONLY 0x0010 948 #define ICBXOPT_LOOP_2_PTP 0x0020 949 #define ICBXOPT_PTP_2_LOOP 0x0030 950 /* 951 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 952 * RIO is not defined for the 23XX cards (just 2200) 953 */ 954 #define ICBXOPT_RIO_OFF 0 955 #define ICBXOPT_RIO_16BIT 1 956 #define ICBXOPT_RIO_32BIT 2 957 #define ICBXOPT_RIO_16BIT_IOCB 3 958 #define ICBXOPT_RIO_32BIT_IOCB 4 959 #define ICBXOPT_ZIO 5 960 #define ICBXOPT_TIMER_MASK 0x7 961 962 #define ICBZOPT_RATE_MASK 0xC000 963 #define ICBZOPT_RATE_ONEGB 0x0000 964 #define ICBZOPT_RATE_AUTO 0x8000 965 #define ICBZOPT_RATE_TWOGB 0x4000 966 #define ICBZOPT_50_OHM 0x2000 967 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 968 #define ICBZOPT_RSPSZ_MASK 0x0030 969 #define ICBZOPT_RSPSZ_24 0x0000 970 #define ICBZOPT_RSPSZ_12 0x0010 971 #define ICBZOPT_RSPSZ_24A 0x0020 972 #define ICBZOPT_RSPSZ_32 0x0030 973 #define ICBZOPT_SOFTID 0x0002 974 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 975 976 /* 2400 F/W options */ 977 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 978 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 979 #define ICB2400_OPT1_PREVLOOP 0x00000800 980 #define ICB2400_OPT1_SRCHDOWN 0x00000400 981 #define ICB2400_OPT1_NOLIP 0x00000200 982 #define ICB2400_OPT1_INI_DISABLE 0x00000020 983 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 984 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 985 #define ICB2400_OPT1_FAIRNESS 0x00000002 986 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 987 988 #define ICB2400_OPT2_FCTAPE 0x00001000 989 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 990 #define ICB2400_OPT2_CLASS2 0x00000100 991 #define ICB2400_OPT2_NO_PLAY 0x00000080 992 #define ICB2400_OPT2_TOPO_MASK 0x00000070 993 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 994 #define ICB2400_OPT2_PTP_ONLY 0x00000010 995 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 996 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 997 #define ICB2400_OPT2_TIMER_MASK 0x00000007 998 #define ICB2400_OPT2_ZIO 0x00000005 999 #define ICB2400_OPT2_ZIO1 0x00000006 1000 1001 #define ICB2400_OPT3_75_OHM 0x00010000 1002 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1003 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1004 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1005 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1006 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1007 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1008 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1009 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1010 #define ICB2400_OPT3_ENA_OOF 0x00000040 1011 /* note that a response size flag of zero is reserved! */ 1012 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1013 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1014 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1015 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1016 #define ICB2400_OPT3_SOFTID 0x00000002 1017 1018 #define ICB_MIN_FRMLEN 256 1019 #define ICB_MAX_FRMLEN 2112 1020 #define ICB_DFLT_FRMLEN 1024 1021 #define ICB_DFLT_ALLOC 256 1022 #define ICB_DFLT_THROTTLE 16 1023 #define ICB_DFLT_RDELAY 5 1024 #define ICB_DFLT_RCOUNT 3 1025 1026 #define ICB_LOGIN_TOV 30 1027 #define ICB_LUN_ENABLE_TOV 180 1028 1029 1030 /* 1031 * And somebody at QLogic had a great idea that you could just change 1032 * the structure *and* keep the version number the same as the other cards. 1033 */ 1034 typedef struct { 1035 uint16_t icb_version; 1036 uint16_t icb_reserved0; 1037 uint16_t icb_maxfrmlen; 1038 uint16_t icb_execthrottle; 1039 uint16_t icb_xchgcnt; 1040 uint16_t icb_hardaddr; 1041 uint8_t icb_portname[8]; 1042 uint8_t icb_nodename[8]; 1043 uint16_t icb_rspnsin; 1044 uint16_t icb_rqstout; 1045 uint16_t icb_retry_count; 1046 uint16_t icb_priout; 1047 uint16_t icb_rsltqlen; 1048 uint16_t icb_rqstqlen; 1049 uint16_t icb_ldn_nols; 1050 uint16_t icb_prqstqlen; 1051 uint16_t icb_rqstaddr[4]; 1052 uint16_t icb_respaddr[4]; 1053 uint16_t icb_priaddr[4]; 1054 uint16_t icb_reserved1[4]; 1055 uint16_t icb_atio_in; 1056 uint16_t icb_atioqlen; 1057 uint16_t icb_atioqaddr[4]; 1058 uint16_t icb_idelaytimer; 1059 uint16_t icb_logintime; 1060 uint32_t icb_fwoptions1; 1061 uint32_t icb_fwoptions2; 1062 uint32_t icb_fwoptions3; 1063 uint16_t icb_reserved2[12]; 1064 } isp_icb_2400_t; 1065 1066 #define RQRSP_ADDR0015 0 1067 #define RQRSP_ADDR1631 1 1068 #define RQRSP_ADDR3247 2 1069 #define RQRSP_ADDR4863 3 1070 1071 1072 #define ICB_NNM0 7 1073 #define ICB_NNM1 6 1074 #define ICB_NNM2 5 1075 #define ICB_NNM3 4 1076 #define ICB_NNM4 3 1077 #define ICB_NNM5 2 1078 #define ICB_NNM6 1 1079 #define ICB_NNM7 0 1080 1081 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1082 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1083 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1084 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1085 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1086 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1087 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1088 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1089 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1090 1091 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1092 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1093 ((uint64_t) array[ICB_NNM1] << 8) | \ 1094 ((uint64_t) array[ICB_NNM2] << 16) | \ 1095 ((uint64_t) array[ICB_NNM3] << 24) | \ 1096 ((uint64_t) array[ICB_NNM4] << 32) | \ 1097 ((uint64_t) array[ICB_NNM5] << 40) | \ 1098 ((uint64_t) array[ICB_NNM6] << 48) | \ 1099 ((uint64_t) array[ICB_NNM7] << 56) 1100 1101 1102 /* 1103 * For MULTI_ID firmware, this describes a 1104 * virtual port entity for getting status. 1105 */ 1106 typedef struct { 1107 uint16_t vp_port_status; 1108 uint8_t vp_port_options; 1109 uint8_t vp_port_loopid; 1110 uint8_t vp_port_portname[8]; 1111 uint8_t vp_port_nodename[8]; 1112 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1113 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1114 } vp_port_info_t; 1115 1116 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1117 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1118 #define ICB2400_VPOPT_ENABLED 0x00000008 1119 #define ICB2400_VPOPT_NOPLAY 0x00000004 1120 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1121 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1122 1123 #define ICB2400_VPOPT_WRITE_SIZE 20 1124 1125 /* 1126 * For MULTI_ID firmware, we append this structure 1127 * to the isp_icb_2400_t above, followed by a list 1128 * structures that are *most* of the vp_port_info_t. 1129 */ 1130 typedef struct { 1131 uint16_t vp_count; 1132 uint16_t vp_global_options; 1133 } isp_icb_2400_vpinfo_t; 1134 1135 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1136 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1137 ICB2400_VPINFO_OFF + \ 1138 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1139 1140 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1141 1142 typedef struct { 1143 isphdr_t vp_ctrl_hdr; 1144 uint32_t vp_ctrl_handle; 1145 uint16_t vp_ctrl_index_fail; 1146 uint16_t vp_ctrl_status; 1147 uint16_t vp_ctrl_command; 1148 uint16_t vp_ctrl_vp_count; 1149 uint16_t vp_ctrl_idmap[8]; 1150 uint8_t vp_ctrl_reserved[32]; 1151 } vp_ctrl_info_t; 1152 1153 #define VP_CTRL_CMD_ENABLE_VP 0 1154 #define VP_CTRL_CMD_DISABLE_VP 8 1155 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1156 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1157 1158 /* 1159 * We can use this structure for modifying either one or two VP ports after initialization 1160 */ 1161 typedef struct { 1162 isphdr_t vp_mod_hdr; 1163 uint32_t vp_mod_hdl; 1164 uint16_t vp_mod_reserved0; 1165 uint16_t vp_mod_status; 1166 uint8_t vp_mod_cmd; 1167 uint8_t vp_mod_cnt; 1168 uint8_t vp_mod_idx0; 1169 uint8_t vp_mod_idx1; 1170 struct { 1171 uint8_t options; 1172 uint8_t loopid; 1173 uint16_t reserved1; 1174 uint8_t wwpn[8]; 1175 uint8_t wwnn[8]; 1176 } vp_mod_ports[2]; 1177 uint8_t vp_mod_reserved2[8]; 1178 } vp_modify_t; 1179 1180 #define VP_STS_OK 0x00 1181 #define VP_STS_ERR 0x01 1182 #define VP_CNT_ERR 0x02 1183 #define VP_GEN_ERR 0x03 1184 #define VP_IDX_ERR 0x04 1185 #define VP_STS_BSY 0x05 1186 1187 #define VP_MODIFY_VP 0x00 1188 #define VP_MODIFY_ENA 0x01 1189 1190 /* 1191 * Port Data Base Element 1192 */ 1193 1194 typedef struct { 1195 uint16_t pdb_options; 1196 uint8_t pdb_mstate; 1197 uint8_t pdb_sstate; 1198 uint8_t pdb_hardaddr_bits[4]; 1199 uint8_t pdb_portid_bits[4]; 1200 uint8_t pdb_nodename[8]; 1201 uint8_t pdb_portname[8]; 1202 uint16_t pdb_execthrottle; 1203 uint16_t pdb_exec_count; 1204 uint8_t pdb_retry_count; 1205 uint8_t pdb_retry_delay; 1206 uint16_t pdb_resalloc; 1207 uint16_t pdb_curalloc; 1208 uint16_t pdb_qhead; 1209 uint16_t pdb_qtail; 1210 uint16_t pdb_tl_next; 1211 uint16_t pdb_tl_last; 1212 uint16_t pdb_features; /* PLOGI, Common Service */ 1213 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1214 uint16_t pdb_roi; /* PLOGI, Common Service */ 1215 uint8_t pdb_target; 1216 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1217 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1218 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1219 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1220 uint16_t pdb_labrtflg; 1221 uint16_t pdb_lstopflg; 1222 uint16_t pdb_sqhead; 1223 uint16_t pdb_sqtail; 1224 uint16_t pdb_ptimer; 1225 uint16_t pdb_nxt_seqid; 1226 uint16_t pdb_fcount; 1227 uint16_t pdb_prli_len; 1228 uint16_t pdb_prli_svc0; 1229 uint16_t pdb_prli_svc3; 1230 uint16_t pdb_loopid; 1231 uint16_t pdb_il_ptr; 1232 uint16_t pdb_sl_ptr; 1233 } isp_pdb_21xx_t; 1234 1235 #define PDB_OPTIONS_XMITTING (1<<11) 1236 #define PDB_OPTIONS_LNKXMIT (1<<10) 1237 #define PDB_OPTIONS_ABORTED (1<<9) 1238 #define PDB_OPTIONS_ADISC (1<<1) 1239 1240 #define PDB_STATE_DISCOVERY 0 1241 #define PDB_STATE_WDISC_ACK 1 1242 #define PDB_STATE_PLOGI 2 1243 #define PDB_STATE_PLOGI_ACK 3 1244 #define PDB_STATE_PRLI 4 1245 #define PDB_STATE_PRLI_ACK 5 1246 #define PDB_STATE_LOGGED_IN 6 1247 #define PDB_STATE_PORT_UNAVAIL 7 1248 #define PDB_STATE_PRLO 8 1249 #define PDB_STATE_PRLO_ACK 9 1250 #define PDB_STATE_PLOGO 10 1251 #define PDB_STATE_PLOG_ACK 11 1252 1253 #define SVC3_TGT_ROLE 0x10 1254 #define SVC3_INI_ROLE 0x20 1255 #define SVC3_ROLE_MASK 0x30 1256 #define SVC3_ROLE_SHIFT 4 1257 1258 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1259 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1260 1261 /* 1262 * Port Data Base Element- 24XX cards 1263 */ 1264 typedef struct { 1265 uint16_t pdb_flags; 1266 uint8_t pdb_curstate; 1267 uint8_t pdb_laststate; 1268 uint8_t pdb_hardaddr_bits[4]; 1269 uint8_t pdb_portid_bits[4]; 1270 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1271 uint16_t pdb_retry_timer; 1272 uint16_t pdb_handle; 1273 uint16_t pdb_rcv_dsize; 1274 uint16_t pdb_reserved0; 1275 uint16_t pdb_prli_svc0; 1276 uint16_t pdb_prli_svc3; 1277 uint8_t pdb_portname[8]; 1278 uint8_t pdb_nodename[8]; 1279 uint8_t pdb_reserved1[24]; 1280 } isp_pdb_24xx_t; 1281 1282 #define PDB2400_TID_SUPPORTED 0x4000 1283 #define PDB2400_FC_TAPE 0x0080 1284 #define PDB2400_CLASS2_ACK0 0x0040 1285 #define PDB2400_FCP_CONF 0x0020 1286 #define PDB2400_CLASS2 0x0010 1287 #define PDB2400_ADDR_VALID 0x0002 1288 1289 #define PDB2400_STATE_PLOGI_PEND 0x03 1290 #define PDB2400_STATE_PLOGI_DONE 0x04 1291 #define PDB2400_STATE_PRLI_PEND 0x05 1292 #define PDB2400_STATE_LOGGED_IN 0x06 1293 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1294 #define PDB2400_STATE_PRLO_PEND 0x09 1295 #define PDB2400_STATE_LOGO_PEND 0x0B 1296 1297 /* 1298 * Common elements from the above two structures that are actually useful to us. 1299 */ 1300 typedef struct { 1301 uint16_t handle; 1302 uint16_t reserved; 1303 uint32_t s3_role : 8, 1304 portid : 24; 1305 uint8_t portname[8]; 1306 uint8_t nodename[8]; 1307 } isp_pdb_t; 1308 1309 /* 1310 * Port Database Changed Async Event information for 24XX cards 1311 */ 1312 #define PDB24XX_AE_OK 0x00 1313 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1314 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1315 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1316 #define PDB24XX_AE_PLOGI_RCVD 0x04 1317 #define PDB24XX_AE_PLOGI_RJT 0x05 1318 #define PDB24XX_AE_PRLI_RCVD 0x06 1319 #define PDB24XX_AE_PRLI_RJT 0x07 1320 #define PDB24XX_AE_TPRLO 0x08 1321 #define PDB24XX_AE_TPRLO_RJT 0x09 1322 #define PDB24XX_AE_PRLO_RCVD 0x0a 1323 #define PDB24XX_AE_LOGO_RCVD 0x0b 1324 #define PDB24XX_AE_TOPO_CHG 0x0c 1325 #define PDB24XX_AE_NPORT_CHG 0x0d 1326 #define PDB24XX_AE_FLOGI_RJT 0x0e 1327 #define PDB24XX_AE_BAD_FANN 0x0f 1328 #define PDB24XX_AE_FLOGI_TIMO 0x10 1329 #define PDB24XX_AE_ABX_LOGO 0x11 1330 #define PDB24XX_AE_PLOGI_DONE 0x12 1331 #define PDB24XX_AE_PRLI_DONJE 0x13 1332 #define PDB24XX_AE_OPN_1 0x14 1333 #define PDB24XX_AE_OPN_2 0x15 1334 #define PDB24XX_AE_TXERR 0x16 1335 #define PDB24XX_AE_FORCED_LOGO 0x17 1336 #define PDB24XX_AE_DISC_TIMO 0x18 1337 1338 /* 1339 * Genericized Port Login/Logout software structure 1340 */ 1341 typedef struct { 1342 uint16_t handle; 1343 uint16_t channel; 1344 uint32_t 1345 flags : 8, 1346 portid : 24; 1347 } isp_plcmd_t; 1348 /* the flags to use are those for PLOGX_FLG_* below */ 1349 1350 /* 1351 * ISP24XX- Login/Logout Port IOCB 1352 */ 1353 typedef struct { 1354 isphdr_t plogx_header; 1355 uint32_t plogx_handle; 1356 uint16_t plogx_status; 1357 uint16_t plogx_nphdl; 1358 uint16_t plogx_flags; 1359 uint16_t plogx_vphdl; /* low 8 bits */ 1360 uint16_t plogx_portlo; /* low 16 bits */ 1361 uint16_t plogx_rspsz_porthi; 1362 struct { 1363 uint16_t lo16; 1364 uint16_t hi16; 1365 } plogx_ioparm[11]; 1366 } isp_plogx_t; 1367 1368 #define PLOGX_STATUS_OK 0x00 1369 #define PLOGX_STATUS_UNAVAIL 0x28 1370 #define PLOGX_STATUS_LOGOUT 0x29 1371 #define PLOGX_STATUS_IOCBERR 0x31 1372 1373 #define PLOGX_IOCBERR_NOLINK 0x01 1374 #define PLOGX_IOCBERR_NOIOCB 0x02 1375 #define PLOGX_IOCBERR_NOXGHG 0x03 1376 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1377 #define PLOGX_IOCBERR_NOFABRIC 0x05 1378 #define PLOGX_IOCBERR_NOTREADY 0x07 1379 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1380 #define PLOGX_IOCBERR_NOPCB 0x0a 1381 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1382 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1383 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1384 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1385 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1386 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1387 1388 #define PLOGX_FLG_CMD_MASK 0xf 1389 #define PLOGX_FLG_CMD_PLOGI 0 1390 #define PLOGX_FLG_CMD_PRLI 1 1391 #define PLOGX_FLG_CMD_PDISC 2 1392 #define PLOGX_FLG_CMD_LOGO 8 1393 #define PLOGX_FLG_CMD_PRLO 9 1394 #define PLOGX_FLG_CMD_TPRLO 10 1395 1396 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1397 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1398 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1399 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1400 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1401 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1402 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1403 1404 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1405 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1406 1407 /* 1408 * Report ID Acquisistion (24XX multi-id firmware) 1409 */ 1410 typedef struct { 1411 isphdr_t ridacq_hdr; 1412 uint32_t ridacq_handle; 1413 union { 1414 struct { 1415 uint8_t ridacq_vp_acquired; 1416 uint8_t ridacq_vp_setup; 1417 uint16_t ridacq_reserved0; 1418 } type0; /* type 0 */ 1419 struct { 1420 uint16_t ridacq_vp_count; 1421 uint8_t ridacq_vp_index; 1422 uint8_t ridacq_vp_status; 1423 } type1; /* type 1 */ 1424 } un; 1425 uint16_t ridacq_vp_port_lo; 1426 uint8_t ridacq_vp_port_hi; 1427 uint8_t ridacq_format; /* 0 or 1 */ 1428 uint16_t ridacq_map[8]; 1429 uint8_t ridacq_reserved1[32]; 1430 } isp_ridacq_t; 1431 1432 #define RIDACQ_STS_COMPLETE 0 1433 #define RIDACQ_STS_UNACQUIRED 1 1434 #define RIDACQ_STS_CHANGED 20 1435 1436 1437 /* 1438 * Simple Name Server Data Structures 1439 */ 1440 #define SNS_GA_NXT 0x100 1441 #define SNS_GPN_ID 0x112 1442 #define SNS_GNN_ID 0x113 1443 #define SNS_GFF_ID 0x11F 1444 #define SNS_GID_FT 0x171 1445 #define SNS_RFT_ID 0x217 1446 typedef struct { 1447 uint16_t snscb_rblen; /* response buffer length (words) */ 1448 uint16_t snscb_reserved0; 1449 uint16_t snscb_addr[4]; /* response buffer address */ 1450 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1451 uint16_t snscb_reserved1; 1452 uint16_t snscb_data[8]; /* variable data (avoid gcc warning) */ 1453 } sns_screq_t; /* Subcommand Request Structure */ 1454 1455 typedef struct { 1456 uint16_t snscb_rblen; /* response buffer length (words) */ 1457 uint16_t snscb_reserved0; 1458 uint16_t snscb_addr[4]; /* response buffer address */ 1459 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1460 uint16_t snscb_reserved1; 1461 uint16_t snscb_cmd; 1462 uint16_t snscb_reserved2; 1463 uint32_t snscb_reserved3; 1464 uint32_t snscb_port; 1465 } sns_ga_nxt_req_t; 1466 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1467 1468 typedef struct { 1469 uint16_t snscb_rblen; /* response buffer length (words) */ 1470 uint16_t snscb_reserved0; 1471 uint16_t snscb_addr[4]; /* response buffer address */ 1472 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1473 uint16_t snscb_reserved1; 1474 uint16_t snscb_cmd; 1475 uint16_t snscb_reserved2; 1476 uint32_t snscb_reserved3; 1477 uint32_t snscb_portid; 1478 } sns_gxn_id_req_t; 1479 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1480 1481 typedef struct { 1482 uint16_t snscb_rblen; /* response buffer length (words) */ 1483 uint16_t snscb_reserved0; 1484 uint16_t snscb_addr[4]; /* response buffer address */ 1485 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1486 uint16_t snscb_reserved1; 1487 uint16_t snscb_cmd; 1488 uint16_t snscb_mword_div_2; 1489 uint32_t snscb_reserved3; 1490 uint32_t snscb_fc4_type; 1491 } sns_gid_ft_req_t; 1492 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1493 1494 typedef struct { 1495 uint16_t snscb_rblen; /* response buffer length (words) */ 1496 uint16_t snscb_reserved0; 1497 uint16_t snscb_addr[4]; /* response buffer address */ 1498 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1499 uint16_t snscb_reserved1; 1500 uint16_t snscb_cmd; 1501 uint16_t snscb_reserved2; 1502 uint32_t snscb_reserved3; 1503 uint32_t snscb_port; 1504 uint32_t snscb_fc4_types[8]; 1505 } sns_rft_id_req_t; 1506 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1507 1508 typedef struct { 1509 ct_hdr_t snscb_cthdr; 1510 uint8_t snscb_port_type; 1511 uint8_t snscb_port_id[3]; 1512 uint8_t snscb_portname[8]; 1513 uint16_t snscb_data[8]; /* variable data (avoid gcc warning) */ 1514 } sns_scrsp_t; /* Subcommand Response Structure */ 1515 1516 typedef struct { 1517 ct_hdr_t snscb_cthdr; 1518 uint8_t snscb_port_type; 1519 uint8_t snscb_port_id[3]; 1520 uint8_t snscb_portname[8]; 1521 uint8_t snscb_pnlen; /* symbolic port name length */ 1522 uint8_t snscb_pname[255]; /* symbolic port name */ 1523 uint8_t snscb_nodename[8]; 1524 uint8_t snscb_nnlen; /* symbolic node name length */ 1525 uint8_t snscb_nname[255]; /* symbolic node name */ 1526 uint8_t snscb_ipassoc[8]; 1527 uint8_t snscb_ipaddr[16]; 1528 uint8_t snscb_svc_class[4]; 1529 uint8_t snscb_fc4_types[32]; 1530 uint8_t snscb_fpname[8]; 1531 uint8_t snscb_reserved; 1532 uint8_t snscb_hardaddr[3]; 1533 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1534 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1535 1536 typedef struct { 1537 ct_hdr_t snscb_cthdr; 1538 uint8_t snscb_wwn[8]; 1539 } sns_gxn_id_rsp_t; 1540 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1541 1542 typedef struct { 1543 ct_hdr_t snscb_cthdr; 1544 uint32_t snscb_fc4_features[32]; 1545 } sns_gff_id_rsp_t; 1546 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1547 1548 typedef struct { 1549 ct_hdr_t snscb_cthdr; 1550 struct { 1551 uint8_t control; 1552 uint8_t portid[3]; 1553 } snscb_ports[1]; 1554 } sns_gid_ft_rsp_t; 1555 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1556 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1557 1558 /* 1559 * Other Misc Structures 1560 */ 1561 1562 /* ELS Pass Through */ 1563 typedef struct { 1564 isphdr_t els_hdr; 1565 uint32_t els_handle; 1566 uint16_t els_status; 1567 uint16_t els_nphdl; 1568 uint16_t els_xmit_dsd_count; /* outgoing only */ 1569 uint8_t els_vphdl; 1570 uint8_t els_sof; 1571 uint32_t els_rxid; 1572 uint16_t els_recv_dsd_count; /* outgoing only */ 1573 uint8_t els_opcode; 1574 uint8_t els_reserved1; 1575 uint8_t els_did_lo; 1576 uint8_t els_did_mid; 1577 uint8_t els_did_hi; 1578 uint8_t els_reserved2; 1579 uint16_t els_reserved3; 1580 uint16_t els_ctl_flags; 1581 union { 1582 struct { 1583 uint32_t _els_bytecnt; 1584 uint32_t _els_subcode1; 1585 uint32_t _els_subcode2; 1586 uint8_t _els_reserved4[20]; 1587 } in; 1588 struct { 1589 uint32_t _els_recv_bytecnt; 1590 uint32_t _els_xmit_bytecnt; 1591 uint32_t _els_xmit_dsd_length; 1592 uint16_t _els_xmit_dsd_a1500; 1593 uint16_t _els_xmit_dsd_a3116; 1594 uint16_t _els_xmit_dsd_a4732; 1595 uint16_t _els_xmit_dsd_a6348; 1596 uint32_t _els_recv_dsd_length; 1597 uint16_t _els_recv_dsd_a1500; 1598 uint16_t _els_recv_dsd_a3116; 1599 uint16_t _els_recv_dsd_a4732; 1600 uint16_t _els_recv_dsd_a6348; 1601 } out; 1602 } inout; 1603 #define els_bytecnt inout.in._els_bytecnt 1604 #define els_subcode1 inout.in._els_subcode1 1605 #define els_subcode2 inout.in._els_subcode2 1606 #define els_reserved4 inout.in._els_reserved4 1607 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1608 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1609 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1610 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1611 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1612 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1613 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1614 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1615 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1616 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1617 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1618 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1619 } els_t; 1620 1621 /* 1622 * A handy package structure for running FC-SCSI commands internally 1623 */ 1624 typedef struct { 1625 uint16_t handle; 1626 uint16_t lun; 1627 uint32_t 1628 channel : 8, 1629 portid : 24; 1630 uint32_t timeout; 1631 union { 1632 struct { 1633 uint32_t data_length; 1634 uint32_t 1635 no_wait : 1, 1636 do_read : 1; 1637 uint8_t cdb[16]; 1638 void *data_ptr; 1639 } beg; 1640 struct { 1641 uint32_t data_residual; 1642 uint8_t status; 1643 uint8_t pad; 1644 uint16_t sense_length; 1645 uint8_t sense_data[32]; 1646 } end; 1647 } fcd; 1648 } isp_xcmd_t; 1649 1650 /* 1651 * Target Mode related definitions 1652 */ 1653 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1654 #define QLTM_SVALID 0x80 1655 1656 /* 1657 * Structure for Enable Lun and Modify Lun queue entries 1658 */ 1659 typedef struct { 1660 isphdr_t le_header; 1661 uint32_t le_reserved; 1662 uint8_t le_lun; 1663 uint8_t le_rsvd; 1664 uint8_t le_ops; /* Modify LUN only */ 1665 uint8_t le_tgt; /* Not for FC */ 1666 uint32_t le_flags; /* Not for FC */ 1667 uint8_t le_status; 1668 uint8_t le_reserved2; 1669 uint8_t le_cmd_count; 1670 uint8_t le_in_count; 1671 uint8_t le_cdb6len; /* Not for FC */ 1672 uint8_t le_cdb7len; /* Not for FC */ 1673 uint16_t le_timeout; 1674 uint16_t le_reserved3[20]; 1675 } lun_entry_t; 1676 1677 /* 1678 * le_flags values 1679 */ 1680 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1681 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1682 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1683 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1684 1685 /* 1686 * le_ops values 1687 */ 1688 #define LUN_CCINCR 0x01 /* increment command count */ 1689 #define LUN_CCDECR 0x02 /* decrement command count */ 1690 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1691 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1692 1693 /* 1694 * le_status values 1695 */ 1696 #define LUN_OK 0x01 /* we be rockin' */ 1697 #define LUN_ERR 0x04 /* request completed with error */ 1698 #define LUN_INVAL 0x06 /* invalid request */ 1699 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1700 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1701 1702 /* 1703 * Immediate Notify Entry structure 1704 */ 1705 #define IN_MSGLEN 8 /* 8 bytes */ 1706 #define IN_RSVDLEN 8 /* 8 words */ 1707 typedef struct { 1708 isphdr_t in_header; 1709 uint32_t in_reserved; 1710 uint8_t in_lun; /* lun */ 1711 uint8_t in_iid; /* initiator */ 1712 uint8_t in_reserved2; 1713 uint8_t in_tgt; /* target */ 1714 uint32_t in_flags; 1715 uint8_t in_status; 1716 uint8_t in_rsvd2; 1717 uint8_t in_tag_val; /* tag value */ 1718 uint8_t in_tag_type; /* tag type */ 1719 uint16_t in_seqid; /* sequence id */ 1720 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1721 uint16_t in_reserved3[IN_RSVDLEN]; 1722 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1723 } in_entry_t; 1724 1725 typedef struct { 1726 isphdr_t in_header; 1727 uint32_t in_reserved; 1728 uint8_t in_lun; /* lun */ 1729 uint8_t in_iid; /* initiator */ 1730 uint16_t in_scclun; 1731 uint32_t in_reserved2; 1732 uint16_t in_status; 1733 uint16_t in_task_flags; 1734 uint16_t in_seqid; /* sequence id */ 1735 } in_fcentry_t; 1736 1737 typedef struct { 1738 isphdr_t in_header; 1739 uint32_t in_reserved; 1740 uint16_t in_iid; /* initiator */ 1741 uint16_t in_scclun; 1742 uint32_t in_reserved2; 1743 uint16_t in_status; 1744 uint16_t in_task_flags; 1745 uint16_t in_seqid; /* sequence id */ 1746 } in_fcentry_e_t; 1747 1748 /* 1749 * Values for the in_status field 1750 */ 1751 #define IN_REJECT 0x0D /* Message Reject message received */ 1752 #define IN_RESET 0x0E /* Bus Reset occurred */ 1753 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1754 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1755 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1756 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1757 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1758 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1759 #define IN_PORT_CHANGED 0x2A /* port changed */ 1760 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1761 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1762 1763 /* 1764 * Values for the in_task_flags field- should only get one at a time! 1765 */ 1766 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1767 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1768 #define TASK_FLAGS_TARGET_RESET (1<<13) 1769 #define TASK_FLAGS_LUN_RESET (1<<12) 1770 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1771 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1772 1773 /* 1774 * ISP24XX Immediate Notify 1775 */ 1776 typedef struct { 1777 isphdr_t in_header; 1778 uint32_t in_reserved; 1779 uint16_t in_nphdl; 1780 uint16_t in_reserved1; 1781 uint16_t in_flags; 1782 uint16_t in_srr_rxid; 1783 uint16_t in_status; 1784 uint8_t in_status_subcode; 1785 uint8_t in_reserved2; 1786 uint32_t in_rxid; 1787 uint16_t in_srr_reloff_lo; 1788 uint16_t in_srr_reloff_hi; 1789 uint16_t in_srr_iu; 1790 uint16_t in_srr_oxid; 1791 /* 1792 * If bit 2 is set in in_flags, the following 1793 * two tags are valid. If the received ELS is 1794 * a LOGO, then these tags contain the N Port ID 1795 * from the LOGO payload. If the received ELS 1796 * request is TPRLO, these tags contain the 1797 * Third Party Originator N Port ID. 1798 */ 1799 uint16_t in_nport_id_hi; 1800 uint8_t in_nport_id_lo; 1801 uint8_t in_reserved3; 1802 /* 1803 * If bit 2 is set in in_flags, the following 1804 * tag is valid. If the received ELS is a LOGO, 1805 * then this tag contains the n-port handle 1806 * from the LOGO payload. If the received ELS 1807 * request is TPRLO, this tag contain the 1808 * n-port handle for the Third Party Originator. 1809 */ 1810 uint16_t in_np_handle; 1811 uint8_t in_reserved4[12]; 1812 uint8_t in_reserved5; 1813 uint8_t in_vpidx; 1814 uint32_t in_reserved6; 1815 uint16_t in_portid_lo; 1816 uint8_t in_portid_hi; 1817 uint8_t in_reserved7; 1818 uint16_t in_reserved8; 1819 uint16_t in_oxid; 1820 } in_fcentry_24xx_t; 1821 1822 #define IN24XX_FLAG_PUREX_IOCB 0x1 1823 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1824 #define IN24XX_FLAG_NPHDL_VALID 0x4 1825 1826 #define IN24XX_LIP_RESET 0x0E 1827 #define IN24XX_LINK_RESET 0x0F 1828 #define IN24XX_PORT_LOGOUT 0x29 1829 #define IN24XX_PORT_CHANGED 0x2A 1830 #define IN24XX_LINK_FAILED 0x2E 1831 #define IN24XX_SRR_RCVD 0x45 1832 #define IN24XX_ELS_RCVD 0x46 /* 1833 * login-affectin ELS received- check 1834 * subcode for specific opcode 1835 */ 1836 1837 /* 1838 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1839 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1840 * Big Endian format. 1841 */ 1842 #define IN24XX_PLOGI_WWNN_OFF 0x20 1843 #define IN24XX_PLOGI_WWPN_OFF 0x28 1844 1845 /* 1846 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1847 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1848 */ 1849 #define IN24XX_LOGO_WWPN_OFF 0x28 1850 1851 /* 1852 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1853 */ 1854 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1855 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1856 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1857 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1858 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1859 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1860 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1861 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1862 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1863 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1864 1865 /* 1866 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1867 */ 1868 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1869 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1870 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1871 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1872 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1873 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1874 1875 /* 1876 * Notify Acknowledge Entry structure 1877 */ 1878 #define NA_RSVDLEN 22 1879 typedef struct { 1880 isphdr_t na_header; 1881 uint32_t na_reserved; 1882 uint8_t na_lun; /* lun */ 1883 uint8_t na_iid; /* initiator */ 1884 uint8_t na_reserved2; 1885 uint8_t na_tgt; /* target */ 1886 uint32_t na_flags; 1887 uint8_t na_status; 1888 uint8_t na_event; 1889 uint16_t na_seqid; /* sequence id */ 1890 uint16_t na_reserved3[NA_RSVDLEN]; 1891 } na_entry_t; 1892 1893 /* 1894 * Value for the na_event field 1895 */ 1896 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1897 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1898 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1899 1900 #define NA2_RSVDLEN 21 1901 typedef struct { 1902 isphdr_t na_header; 1903 uint32_t na_reserved; 1904 uint8_t na_reserved1; 1905 uint8_t na_iid; /* initiator loop id */ 1906 uint16_t na_response; 1907 uint16_t na_flags; 1908 uint16_t na_reserved2; 1909 uint16_t na_status; 1910 uint16_t na_task_flags; 1911 uint16_t na_seqid; /* sequence id */ 1912 uint16_t na_reserved3[NA2_RSVDLEN]; 1913 } na_fcentry_t; 1914 1915 typedef struct { 1916 isphdr_t na_header; 1917 uint32_t na_reserved; 1918 uint16_t na_iid; /* initiator loop id */ 1919 uint16_t na_response; /* response code */ 1920 uint16_t na_flags; 1921 uint16_t na_reserved2; 1922 uint16_t na_status; 1923 uint16_t na_task_flags; 1924 uint16_t na_seqid; /* sequence id */ 1925 uint16_t na_reserved3[NA2_RSVDLEN]; 1926 } na_fcentry_e_t; 1927 1928 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1929 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1930 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1931 1932 /* 1933 * ISP24XX Notify Acknowledge 1934 */ 1935 1936 typedef struct { 1937 isphdr_t na_header; 1938 uint32_t na_handle; 1939 uint16_t na_nphdl; 1940 uint16_t na_reserved1; 1941 uint16_t na_flags; 1942 uint16_t na_srr_rxid; 1943 uint16_t na_status; 1944 uint8_t na_status_subcode; 1945 uint8_t na_reserved2; 1946 uint32_t na_rxid; 1947 uint16_t na_srr_reloff_lo; 1948 uint16_t na_srr_reloff_hi; 1949 uint16_t na_srr_iu; 1950 uint16_t na_srr_flags; 1951 uint8_t na_reserved3[18]; 1952 uint8_t na_reserved4; 1953 uint8_t na_vpidx; 1954 uint8_t na_srr_reject_vunique; 1955 uint8_t na_srr_reject_explanation; 1956 uint8_t na_srr_reject_code; 1957 uint8_t na_reserved5; 1958 uint8_t na_reserved6[6]; 1959 uint16_t na_oxid; 1960 } na_fcentry_24xx_t; 1961 1962 /* 1963 * Accept Target I/O Entry structure 1964 */ 1965 #define ATIO_CDBLEN 26 1966 1967 typedef struct { 1968 isphdr_t at_header; 1969 uint16_t at_reserved; 1970 uint16_t at_handle; 1971 uint8_t at_lun; /* lun */ 1972 uint8_t at_iid; /* initiator */ 1973 uint8_t at_cdblen; /* cdb length */ 1974 uint8_t at_tgt; /* target */ 1975 uint32_t at_flags; 1976 uint8_t at_status; /* firmware status */ 1977 uint8_t at_scsi_status; /* scsi status */ 1978 uint8_t at_tag_val; /* tag value */ 1979 uint8_t at_tag_type; /* tag type */ 1980 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1981 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1982 } at_entry_t; 1983 1984 /* 1985 * at_flags values 1986 */ 1987 #define AT_NODISC 0x00008000 /* disconnect disabled */ 1988 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1989 1990 /* 1991 * at_status values 1992 */ 1993 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1994 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1995 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1996 #define AT_NOCAP 0x16 /* Requested capability not available */ 1997 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1998 #define AT_CDB 0x3D /* CDB received */ 1999 /* 2000 * Macros to create and fetch and test concatenated handle and tag value macros 2001 * (SPI only) 2002 */ 2003 #define AT_MAKE_TAGID(tid, aep) \ 2004 tid = aep->at_handle; \ 2005 if (aep->at_flags & AT_TQAE) { \ 2006 tid |= (aep->at_tag_val << 16); \ 2007 tid |= (1 << 24); \ 2008 } 2009 2010 #define CT_MAKE_TAGID(tid, ct) \ 2011 tid = ct->ct_fwhandle; \ 2012 if (ct->ct_flags & CT_TQAE) { \ 2013 tid |= (ct->ct_tag_val << 16); \ 2014 tid |= (1 << 24); \ 2015 } 2016 2017 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2018 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2019 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2020 2021 #define IN_MAKE_TAGID(tid, inp) \ 2022 tid = inp->in_seqid; \ 2023 tid |= (inp->in_tag_val << 16); \ 2024 tid |= (1 << 24) 2025 2026 /* 2027 * Accept Target I/O Entry structure, Type 2 2028 */ 2029 #define ATIO2_CDBLEN 16 2030 2031 typedef struct { 2032 isphdr_t at_header; 2033 uint32_t at_reserved; 2034 uint8_t at_lun; /* lun or reserved */ 2035 uint8_t at_iid; /* initiator */ 2036 uint16_t at_rxid; /* response ID */ 2037 uint16_t at_flags; 2038 uint16_t at_status; /* firmware status */ 2039 uint8_t at_crn; /* command reference number */ 2040 uint8_t at_taskcodes; 2041 uint8_t at_taskflags; 2042 uint8_t at_execodes; 2043 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2044 uint32_t at_datalen; /* allocated data len */ 2045 uint16_t at_scclun; /* SCC Lun or reserved */ 2046 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2047 uint16_t at_reserved2[6]; 2048 uint16_t at_oxid; 2049 } at2_entry_t; 2050 2051 typedef struct { 2052 isphdr_t at_header; 2053 uint32_t at_reserved; 2054 uint16_t at_iid; /* initiator */ 2055 uint16_t at_rxid; /* response ID */ 2056 uint16_t at_flags; 2057 uint16_t at_status; /* firmware status */ 2058 uint8_t at_crn; /* command reference number */ 2059 uint8_t at_taskcodes; 2060 uint8_t at_taskflags; 2061 uint8_t at_execodes; 2062 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2063 uint32_t at_datalen; /* allocated data len */ 2064 uint16_t at_scclun; /* SCC Lun or reserved */ 2065 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2066 uint16_t at_reserved2[6]; 2067 uint16_t at_oxid; 2068 } at2e_entry_t; 2069 2070 #define ATIO2_WWPN_OFFSET 0x2A 2071 #define ATIO2_OXID_OFFSET 0x3E 2072 2073 #define ATIO2_TC_ATTR_MASK 0x7 2074 #define ATIO2_TC_ATTR_SIMPLEQ 0 2075 #define ATIO2_TC_ATTR_HEADOFQ 1 2076 #define ATIO2_TC_ATTR_ORDERED 2 2077 #define ATIO2_TC_ATTR_ACAQ 4 2078 #define ATIO2_TC_ATTR_UNTAGGED 5 2079 2080 #define ATIO2_EX_WRITE 0x1 2081 #define ATIO2_EX_READ 0x2 2082 /* 2083 * Macros to create and fetch and test concatenated handle and tag value macros 2084 */ 2085 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2086 tid = aep->at_rxid; \ 2087 tid |= (((uint64_t)inst) << 32); \ 2088 tid |= (((uint64_t)bus) << 48) 2089 2090 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2091 tid = ct->ct_rxid; \ 2092 tid |= (((uint64_t)inst) << 32); \ 2093 tid |= (((uint64_t)(bus & 0xff)) << 48) 2094 2095 #define AT2_HAS_TAG(val) 1 2096 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2097 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2098 #define AT2_GET_HANDLE AT2_GET_TAG 2099 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2100 2101 #define FC_HAS_TAG AT2_HAS_TAG 2102 #define FC_GET_TAG AT2_GET_TAG 2103 #define FC_GET_INST AT2_GET_INST 2104 #define FC_GET_HANDLE AT2_GET_HANDLE 2105 2106 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2107 tid = seqid; \ 2108 tid |= (((uint64_t)inst) << 32); \ 2109 tid |= (((uint64_t)(bus & 0xff)) << 48) 2110 2111 #define FC_TAG_INSERT_INST(tid, inst) \ 2112 tid &= ~0x0000ffff00000000ull; \ 2113 tid |= (((uint64_t)inst) << 32) 2114 2115 /* 2116 * 24XX ATIO Definition 2117 * 2118 * This is *quite* different from other entry types. 2119 * First of all, it has its own queue it comes in on. 2120 * 2121 * Secondly, it doesn't have a normal header. 2122 * 2123 * Thirdly, it's just a passthru of the FCP CMND IU 2124 * which is recorded in big endian mode. 2125 */ 2126 typedef struct { 2127 uint8_t at_type; 2128 uint8_t at_count; 2129 /* 2130 * Task attribute in high four bits, 2131 * the rest is the FCP CMND IU Length. 2132 * NB: the command can extend past the 2133 * length for a single queue entry. 2134 */ 2135 uint16_t at_ta_len; 2136 uint32_t at_rxid; 2137 fc_hdr_t at_hdr; 2138 fcp_cmnd_iu_t at_cmnd; 2139 } at7_entry_t; 2140 #define AT7_NORESRC_RXID 0xffffffff 2141 2142 2143 /* 2144 * Continue Target I/O Entry structure 2145 * Request from driver. The response from the 2146 * ISP firmware is the same except that the last 18 2147 * bytes are overwritten by suggested sense data if 2148 * the 'autosense valid' bit is set in the status byte. 2149 */ 2150 typedef struct { 2151 isphdr_t ct_header; 2152 uint16_t ct_syshandle; 2153 uint16_t ct_fwhandle; /* required by f/w */ 2154 uint8_t ct_lun; /* lun */ 2155 uint8_t ct_iid; /* initiator id */ 2156 uint8_t ct_reserved2; 2157 uint8_t ct_tgt; /* our target id */ 2158 uint32_t ct_flags; 2159 uint8_t ct_status; /* isp status */ 2160 uint8_t ct_scsi_status; /* scsi status */ 2161 uint8_t ct_tag_val; /* tag value */ 2162 uint8_t ct_tag_type; /* tag type */ 2163 uint32_t ct_xfrlen; /* transfer length */ 2164 int32_t ct_resid; /* residual length */ 2165 uint16_t ct_timeout; 2166 uint16_t ct_seg_count; 2167 ispds_t ct_dataseg[ISP_RQDSEG]; 2168 } ct_entry_t; 2169 2170 /* 2171 * For some of the dual port SCSI adapters, port (bus #) is reported 2172 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2173 * 2174 * Note that this does not apply to FC adapters at all which can and 2175 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2176 * that have logged in across a SCSI fabric. 2177 */ 2178 #define GET_IID_VAL(x) (x & 0x3f) 2179 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2180 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2181 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2182 2183 /* 2184 * ct_flags values 2185 */ 2186 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2187 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2188 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2189 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2190 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2191 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2192 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2193 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2194 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2195 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2196 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2197 2198 /* 2199 * ct_status values 2200 * - set by the firmware when it returns the CTIO 2201 */ 2202 #define CT_OK 0x01 /* completed without error */ 2203 #define CT_ABORTED 0x02 /* aborted by host */ 2204 #define CT_ERR 0x04 /* see sense data for error */ 2205 #define CT_INVAL 0x06 /* request for disabled lun */ 2206 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2207 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2208 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2209 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2210 #define CT_TIMEOUT 0x0B /* timed out */ 2211 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2212 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2213 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2214 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2215 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2216 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2217 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2218 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2219 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2220 #define CT_LOGOUT 0x29 /* port logout */ 2221 #define CT_PORTCHANGED 0x2A /* port changed */ 2222 #define CT_IDE 0x33 /* Initiator Detected Error */ 2223 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2224 #define CT_SRR 0x45 /* SRR Received */ 2225 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2226 2227 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2228 2229 /* 2230 * When the firmware returns a CTIO entry, it may overwrite the last 2231 * part of the structure with sense data. This starts at offset 0x2E 2232 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2233 * than define a new struct for this, I'm just using the sense data 2234 * offset. 2235 */ 2236 #define CTIO_SENSE_OFFSET 0x2E 2237 2238 /* 2239 * Entry length in u_longs. All entries are the same size so 2240 * any one will do as the numerator. 2241 */ 2242 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2243 2244 /* 2245 * QLA2100 CTIO (type 2) entry 2246 */ 2247 #define MAXRESPLEN 26 2248 typedef struct { 2249 isphdr_t ct_header; 2250 uint32_t ct_syshandle; 2251 uint8_t ct_lun; /* lun */ 2252 uint8_t ct_iid; /* initiator id */ 2253 uint16_t ct_rxid; /* response ID */ 2254 uint16_t ct_flags; 2255 uint16_t ct_status; /* isp status */ 2256 uint16_t ct_timeout; 2257 uint16_t ct_seg_count; 2258 uint32_t ct_reloff; /* relative offset */ 2259 int32_t ct_resid; /* residual length */ 2260 union { 2261 /* 2262 * The three different modes that the target driver 2263 * can set the CTIO{2,3,4} up as. 2264 * 2265 * The first is for sending FCP_DATA_IUs as well as 2266 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2267 * 2268 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2269 * Note that no FCP_DATA_IUs will be sent. 2270 * 2271 * The third is for sending FCP_RSP_IUs as built specifically 2272 * in system memory as located by the isp_dataseg. 2273 */ 2274 struct { 2275 uint32_t _reserved; 2276 uint16_t _reserved2; 2277 uint16_t ct_scsi_status; 2278 uint32_t ct_xfrlen; 2279 union { 2280 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2281 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2282 ispdslist_t ct_dslist; 2283 } u; 2284 } m0; 2285 struct { 2286 uint16_t _reserved; 2287 uint16_t _reserved2; 2288 uint16_t ct_senselen; 2289 uint16_t ct_scsi_status; 2290 uint16_t ct_resplen; 2291 uint8_t ct_resp[MAXRESPLEN]; 2292 } m1; 2293 struct { 2294 uint32_t _reserved; 2295 uint16_t _reserved2; 2296 uint16_t _reserved3; 2297 uint32_t ct_datalen; 2298 ispds_t ct_fcp_rsp_iudata; 2299 } m2; 2300 } rsp; 2301 } ct2_entry_t; 2302 2303 typedef struct { 2304 isphdr_t ct_header; 2305 uint32_t ct_syshandle; 2306 uint16_t ct_iid; /* initiator id */ 2307 uint16_t ct_rxid; /* response ID */ 2308 uint16_t ct_flags; 2309 uint16_t ct_status; /* isp status */ 2310 uint16_t ct_timeout; 2311 uint16_t ct_seg_count; 2312 uint32_t ct_reloff; /* relative offset */ 2313 int32_t ct_resid; /* residual length */ 2314 union { 2315 struct { 2316 uint32_t _reserved; 2317 uint16_t _reserved2; 2318 uint16_t ct_scsi_status; 2319 uint32_t ct_xfrlen; 2320 union { 2321 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2322 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2323 ispdslist_t ct_dslist; 2324 } u; 2325 } m0; 2326 struct { 2327 uint16_t _reserved; 2328 uint16_t _reserved2; 2329 uint16_t ct_senselen; 2330 uint16_t ct_scsi_status; 2331 uint16_t ct_resplen; 2332 uint8_t ct_resp[MAXRESPLEN]; 2333 } m1; 2334 struct { 2335 uint32_t _reserved; 2336 uint16_t _reserved2; 2337 uint16_t _reserved3; 2338 uint32_t ct_datalen; 2339 ispds_t ct_fcp_rsp_iudata; 2340 } m2; 2341 } rsp; 2342 } ct2e_entry_t; 2343 2344 /* 2345 * ct_flags values for CTIO2 2346 */ 2347 #define CT2_FLAG_MODE0 0x0000 2348 #define CT2_FLAG_MODE1 0x0001 2349 #define CT2_FLAG_MODE2 0x0002 2350 #define CT2_FLAG_MMASK 0x0003 2351 #define CT2_DATA_IN 0x0040 2352 #define CT2_DATA_OUT 0x0080 2353 #define CT2_NO_DATA 0x00C0 2354 #define CT2_DATAMASK 0x00C0 2355 #define CT2_CCINCR 0x0100 2356 #define CT2_FASTPOST 0x0200 2357 #define CT2_CONFIRM 0x2000 2358 #define CT2_TERMINATE 0x4000 2359 #define CT2_SENDSTATUS 0x8000 2360 2361 /* 2362 * ct_status values are (mostly) the same as that for ct_entry. 2363 */ 2364 2365 /* 2366 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2367 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2368 * fields. 2369 */ 2370 #define CT2_RSPLEN_VALID 0x0100 2371 #define CT2_SNSLEN_VALID 0x0200 2372 #define CT2_DATA_OVER 0x0400 2373 #define CT2_DATA_UNDER 0x0800 2374 2375 /* 2376 * ISP24XX CTIO 2377 */ 2378 #define MAXRESPLEN_24XX 24 2379 typedef struct { 2380 isphdr_t ct_header; 2381 uint32_t ct_syshandle; 2382 uint16_t ct_nphdl; /* status on returned CTIOs */ 2383 uint16_t ct_timeout; 2384 uint16_t ct_seg_count; 2385 uint8_t ct_vpidx; 2386 uint8_t ct_xflags; 2387 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2388 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2389 uint8_t ct_reserved; 2390 uint32_t ct_rxid; 2391 uint16_t ct_senselen; /* mode 1 only */ 2392 uint16_t ct_flags; 2393 int32_t ct_resid; /* residual length */ 2394 uint16_t ct_oxid; 2395 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2396 union { 2397 struct { 2398 uint32_t reloff; 2399 uint32_t reserved0; 2400 uint32_t ct_xfrlen; 2401 uint32_t reserved1; 2402 ispds64_t ds; 2403 } m0; 2404 struct { 2405 uint16_t ct_resplen; 2406 uint16_t reserved; 2407 uint8_t ct_resp[MAXRESPLEN_24XX]; 2408 } m1; 2409 struct { 2410 uint32_t reserved0; 2411 uint32_t ct_datalen; 2412 uint32_t reserved1; 2413 ispds64_t ct_fcp_rsp_iudata; 2414 } m2; 2415 } rsp; 2416 } ct7_entry_t; 2417 2418 /* 2419 * ct_flags values for CTIO7 2420 */ 2421 #define CT7_DATA_IN 0x0002 2422 #define CT7_DATA_OUT 0x0001 2423 #define CT7_NO_DATA 0x0000 2424 #define CT7_DATAMASK 0x003 2425 #define CT7_DSD_ENABLE 0x0004 2426 #define CT7_CONF_STSFD 0x0010 2427 #define CT7_EXPLCT_CONF 0x0020 2428 #define CT7_FLAG_MODE0 0x0000 2429 #define CT7_FLAG_MODE1 0x0040 2430 #define CT7_FLAG_MODE2 0x0080 2431 #define CT7_FLAG_MMASK 0x00C0 2432 #define CT7_NOACK 0x0100 2433 #define CT7_TASK_ATTR_SHIFT 9 2434 #define CT7_CONFIRM 0x2000 2435 #define CT7_TERMINATE 0x4000 2436 #define CT7_SENDSTATUS 0x8000 2437 2438 /* 2439 * Type 7 CTIO status codes 2440 */ 2441 #define CT7_OK 0x01 /* completed without error */ 2442 #define CT7_ABORTED 0x02 /* aborted by host */ 2443 #define CT7_ERR 0x04 /* see sense data for error */ 2444 #define CT7_INVAL 0x06 /* request for disabled lun */ 2445 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2446 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2447 #define CT7_TIMEOUT 0x0B /* timed out */ 2448 #define CT7_RESET 0x0E /* LIP Rset Received */ 2449 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2450 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2451 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2452 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2453 #define CT7_LOGOUT 0x29 /* port logout */ 2454 #define CT7_PORTCHANGED 0x2A /* port changed */ 2455 #define CT7_SRR 0x45 /* SRR Received */ 2456 2457 /* 2458 * Other 24XX related target IOCBs 2459 */ 2460 2461 /* 2462 * ABTS Received 2463 */ 2464 typedef struct { 2465 isphdr_t abts_header; 2466 uint8_t abts_reserved0[6]; 2467 uint16_t abts_nphdl; 2468 uint16_t abts_reserved1; 2469 uint16_t abts_sof; 2470 uint32_t abts_rxid_abts; 2471 uint16_t abts_did_lo; 2472 uint8_t abts_did_hi; 2473 uint8_t abts_r_ctl; 2474 uint16_t abts_sid_lo; 2475 uint8_t abts_sid_hi; 2476 uint8_t abts_cs_ctl; 2477 uint16_t abts_fs_ctl; 2478 uint8_t abts_f_ctl; 2479 uint8_t abts_type; 2480 uint16_t abts_seq_cnt; 2481 uint8_t abts_df_ctl; 2482 uint8_t abts_seq_id; 2483 uint16_t abts_rx_id; 2484 uint16_t abts_ox_id; 2485 uint32_t abts_param; 2486 uint8_t abts_reserved2[16]; 2487 uint32_t abts_rxid_task; 2488 } abts_t; 2489 2490 typedef struct { 2491 isphdr_t abts_rsp_header; 2492 uint32_t abts_rsp_handle; 2493 uint16_t abts_rsp_status; 2494 uint16_t abts_rsp_nphdl; 2495 uint16_t abts_rsp_ctl_flags; 2496 uint16_t abts_rsp_sof; 2497 uint32_t abts_rsp_rxid_abts; 2498 uint16_t abts_rsp_did_lo; 2499 uint8_t abts_rsp_did_hi; 2500 uint8_t abts_rsp_r_ctl; 2501 uint16_t abts_rsp_sid_lo; 2502 uint8_t abts_rsp_sid_hi; 2503 uint8_t abts_rsp_cs_ctl; 2504 uint16_t abts_rsp_f_ctl_lo; 2505 uint8_t abts_rsp_f_ctl_hi; 2506 uint8_t abts_rsp_type; 2507 uint16_t abts_rsp_seq_cnt; 2508 uint8_t abts_rsp_df_ctl; 2509 uint8_t abts_rsp_seq_id; 2510 uint16_t abts_rsp_rx_id; 2511 uint16_t abts_rsp_ox_id; 2512 uint32_t abts_rsp_param; 2513 union { 2514 struct { 2515 uint16_t reserved; 2516 uint8_t last_seq_id; 2517 uint8_t seq_id_valid; 2518 uint16_t aborted_rx_id; 2519 uint16_t aborted_ox_id; 2520 uint16_t high_seq_cnt; 2521 uint16_t low_seq_cnt; 2522 uint8_t reserved2[4]; 2523 } ba_acc; 2524 struct { 2525 uint8_t vendor_unique; 2526 uint8_t explanation; 2527 uint8_t reason; 2528 uint8_t reserved; 2529 uint8_t reserved2[12]; 2530 } ba_rjt; 2531 struct { 2532 uint8_t reserved[8]; 2533 uint32_t subcode1; 2534 uint32_t subcode2; 2535 } rsp; 2536 uint8_t reserved[16]; 2537 } abts_rsp_payload; 2538 uint32_t abts_rsp_rxid_task; 2539 } abts_rsp_t; 2540 2541 /* terminate this ABTS exchange */ 2542 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2543 2544 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2545 #define ISP24XX_ABTS_RSP_RESET 0x04 2546 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2547 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2548 #define ISP24XX_ABTS_RSP_INVXID 0x08 2549 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2550 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2551 2552 #define ISP24XX_NO_TASK 0xffffffff 2553 2554 /* 2555 * Miscellaneous 2556 * 2557 * These are the limits of the number of dma segments we 2558 * can deal with based not on the size of the segment counter 2559 * (which is 16 bits), but on the size of the number of 2560 * queue entries field (which is 8 bits). We assume no 2561 * segments in the first queue entry, so we can either 2562 * have 7 dma segments per continuation entry or 5 2563 * (for 64 bit dma).. multiplying out by 254.... 2564 */ 2565 #define ISP_NSEG_MAX 1778 2566 #define ISP_NSEG64_MAX 1270 2567 2568 #endif /* _ISPMBOX_H */ 2569