xref: /dragonfly/sys/bus/firewire/iec13213.h (revision 921f5a3f384eea2309f6e19f791ab970e5808d83)
1 /*
2  * Copyright (c) 2003 Hidetoshi Shimokawa
3  * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the acknowledgement as bellow:
16  *
17  *    This product includes software developed by K. Kobayashi and H. Shimokawa
18  *
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
31  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32  * POSSIBILITY OF SUCH DAMAGE.
33  *
34  * $FreeBSD: src/sys/dev/firewire/iec13213.h,v 1.10 2003/06/16 08:29:24 simokawa Exp $
35  */
36 
37 #define   STATE_CLEAR         0x0000
38 #define   STATE_SET 0x0004
39 #define   NODE_IDS  0x0008
40 #define   RESET_START         0x000c
41 #define   SPLIT_TIMEOUT_HI    0x0018
42 #define   SPLIT_TIMEOUT_LO    0x001c
43 #define   CYCLE_TIME          0x0200
44 #define   BUS_TIME  0x0204
45 #define   BUSY_TIMEOUT        0x0210
46 #define   PRIORITY_BUDGET 0x0218
47 #define   BUS_MGR_ID          0x021c
48 #define   BANDWIDTH_AV        0x0220
49 #define   CHANNELS_AV_HI      0x0224
50 #define   CHANNELS_AV_LO      0x0228
51 #define   IP_CHANNELS         0x0234
52 
53 #define   CONF_ROM  0x0400
54 
55 #define   TOPO_MAP  0x1000
56 #define   SPED_MAP  0x2000
57 
58 #define CSRTYPE_SHIFT         6
59 #define CSRTYPE_MASK          (3 << CSRTYPE_SHIFT)
60 #define CSRTYPE_I   (0 << CSRTYPE_SHIFT) /* Immediate */
61 #define CSRTYPE_C   (1 << CSRTYPE_SHIFT) /* CSR offset */
62 #define CSRTYPE_L   (2 << CSRTYPE_SHIFT) /* Leaf */
63 #define CSRTYPE_D   (3 << CSRTYPE_SHIFT) /* Directory */
64 
65 /*
66  * CSR keys
67  * 00 - 2F: defined by CSR architecture standards.
68  * 30 - 37: defined by BUS starndards
69  * 38 - 3F: defined by Vendor/Specifier
70  */
71 #define CSRKEY_MASK 0x3f
72 #define CSRKEY_DESC 0x01 /* Descriptor */
73 #define CSRKEY_BDINFO         0x02 /* Bus_Dependent_Info */
74 #define CSRKEY_VENDOR         0x03 /* Vendor */
75 #define CSRKEY_HW   0x04 /* Hardware_Version */
76 #define CSRKEY_MODULE         0x07 /* Module */
77 #define CSRKEY_NCAP 0x0c /* Node_Capabilities */
78 #define CSRKEY_EUI64          0x0d /* EUI_64 */
79 #define CSRKEY_UNIT 0x11 /* Unit */
80 #define CSRKEY_SPEC 0x12 /* Specifier_ID */
81 #define CSRKEY_VER  0x13 /* Version */
82 #define CSRKEY_DINFO          0x14 /* Dependent_Info */
83 #define CSRKEY_ULOC 0x15 /* Unit_Location */
84 #define CSRKEY_MODEL          0x17 /* Model */
85 #define CSRKEY_INST 0x18 /* Instance */
86 #define CSRKEY_KEYW 0x19 /* Keyword */
87 #define CSRKEY_FEAT 0x1a /* Feature */
88 #define CSRKEY_EROM 0x1b /* Extended_ROM */
89 #define CSRKEY_EKSID          0x1c /* Extended_Key_Specifier_ID */
90 #define CSRKEY_EKEY 0x1d /* Extended_Key */
91 #define CSRKEY_EDATA          0x1e /* Extended_Data */
92 #define CSRKEY_MDESC          0x1f /* Modifiable_Descriptor */
93 #define CSRKEY_DID  0x20 /* Directory_ID */
94 #define CSRKEY_REV  0x21 /* Revision */
95 
96 #define CSRKEY_FIRM_VER       0x3c /* Firemware version */
97 #define CSRKEY_UNIT_CH        0x3a /* Unit characteristics */
98 #define CSRKEY_COM_SPEC       0x38 /* Command set revision */
99 #define CSRKEY_COM_SET        0x39 /* Command set */
100 
101 #define CROM_UDIR   (CSRTYPE_D | CSRKEY_UNIT)  /* 0x81 Unit directory */
102 #define CROM_TEXTLEAF         (CSRTYPE_L | CSRKEY_DESC)  /* 0x81 Text leaf */
103 #define CROM_LUN    (CSRTYPE_I | CSRKEY_DINFO) /* 0x14 Logical unit num. */
104 #define CROM_MGM    (CSRTYPE_C | CSRKEY_DINFO) /* 0x54 Management agent */
105 
106 #define CSRVAL_VENDOR_PRIVATE 0xacde48
107 #define CSRVAL_1394TA         0x00a02d
108 #define CSRVAL_ANSIT10        0x00609e
109 #define CSRVAL_IETF 0x00005e
110 
111 #define CSR_PROTAVC 0x010001
112 #define CSR_PROTCAL 0x010002
113 #define CSR_PROTEHS 0x010004
114 #define CSR_PROTHAVI          0x010008
115 #define CSR_PROTCAM104        0x000100
116 #define CSR_PROTCAM120        0x000101
117 #define CSR_PROTCAM130        0x000102
118 #define CSR_PROTDPP 0x0a6be2
119 #define CSR_PROTIICP          0x4b661f
120 
121 #define CSRVAL_T10SBP2        0x010483
122 #define CSRVAL_SCSI 0x0104d8
123 
124 struct csrreg {
125 #if BYTE_ORDER == BIG_ENDIAN
126           u_int32_t key:8,
127                       val:24;
128 #else
129           u_int32_t val:24,
130                       key:8;
131 #endif
132 };
133 struct csrhdr {
134 #if BYTE_ORDER == BIG_ENDIAN
135           u_int32_t info_len:8,
136                       crc_len:8,
137                       crc:16;
138 #else
139           u_int32_t crc:16,
140                       crc_len:8,
141                       info_len:8;
142 #endif
143 };
144 struct csrdirectory {
145           BIT16x2(crc_len, crc);
146           struct csrreg entry[0];
147 };
148 struct csrtext {
149           BIT16x2(crc_len, crc);
150 #if BYTE_ORDER == BIG_ENDIAN
151           u_int32_t spec_type:8,
152                       spec_id:24;
153 #else
154           u_int32_t spec_id:24,
155                       spec_type:8;
156 #endif
157           u_int32_t lang_id;
158           u_int32_t text[0];
159 };
160 
161 struct bus_info {
162 #define   CSR_BUS_NAME_IEEE1394         0x31333934
163           u_int32_t bus_name;
164 #if BYTE_ORDER == BIG_ENDIAN
165           u_int32_t irmc:1,             /* iso. resource manager capable */
166                       cmc:1,            /* cycle master capable */
167                       isc:1,            /* iso. operation support */
168                       bmc:1,            /* bus manager capable */
169                       pmc:1,            /* power manager capable */
170                       :3,
171                       cyc_clk_acc:8,    /* 0 <= ppm <= 100 */
172                       max_rec:4,                  /* (2 << max_rec) bytes */
173                       :2,
174                       max_rom:2,
175                       generation:4,
176                       :1,
177                       link_spd:3;
178 #else
179           u_int32_t link_spd:3,
180                       :1,
181                       generation:4,
182                       max_rom:2,
183                       :2,
184                       max_rec:4,                  /* (2 << max_rec) bytes */
185                       cyc_clk_acc:8,    /* 0 <= ppm <= 100 */
186                       :3,
187                       pmc:1,            /* power manager capable */
188                       bmc:1,            /* bus manager capable */
189                       isc:1,            /* iso. operation support */
190                       cmc:1,            /* cycle master capable */
191                       irmc:1;           /* iso. resource manager capable */
192 #endif
193           struct fw_eui64 eui64;
194 };
195 /* max_rom */
196 #define MAXROM_4    0
197 #define MAXROM_64   1
198 #define MAXROM_1024 2
199 
200 #define CROM_MAX_DEPTH        10
201 struct crom_ptr {
202           struct csrdirectory *dir;
203           int index;
204 };
205 
206 struct crom_context {
207           int depth;
208           struct crom_ptr stack[CROM_MAX_DEPTH];
209 };
210 
211 void crom_init_context(struct crom_context *, u_int32_t *);
212 struct csrreg *crom_get(struct crom_context *);
213 void crom_next(struct crom_context *);
214 void crom_parse_text(struct crom_context *, char *, int);
215 u_int16_t crom_crc(u_int32_t *r, int);
216 struct csrreg *crom_search_key(struct crom_context *, u_int8_t);
217 int crom_has_specver(u_int32_t *, u_int32_t, u_int32_t);
218 
219 #ifndef _KERNEL
220 const char *crom_desc(struct crom_context *, char *, int);
221 #endif
222 
223 /* For CROM build */
224 #if defined(_KERNEL) || defined(TEST)
225 #define CROM_MAX_CHUNK_LEN 20
226 struct crom_src {
227           struct csrhdr hdr;
228           struct bus_info businfo;
229           STAILQ_HEAD(, crom_chunk) chunk_list;
230 };
231 
232 struct crom_chunk {
233           STAILQ_ENTRY(crom_chunk) link;
234           struct crom_chunk *ref_chunk;
235           int ref_index;
236           int offset;
237           struct {
238                     BIT16x2(crc_len, crc);
239                     u_int32_t buf[CROM_MAX_CHUNK_LEN];
240           } data;
241 };
242 
243 extern int crom_add_quad(struct crom_chunk *, u_int32_t);
244 extern int crom_add_entry(struct crom_chunk *, int, int);
245 extern int crom_add_chunk(struct crom_src *src, struct crom_chunk *,
246                                                   struct crom_chunk *, int);
247 extern int crom_add_simple_text(struct crom_src *src, struct crom_chunk *,
248                                                   struct crom_chunk *, char *);
249 extern int crom_load(struct crom_src *, u_int32_t *, int);
250 #endif
251