Home
last modified time | relevance | path

Searched refs:CP_STAT__ROQ_CE_RING_BUSY__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h3089 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT 0x0000001c macro
HDgfx_7_2_sh_mask.h3006 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT 0x1c macro
HDgfx_8_1_sh_mask.h4144 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT 0x1c macro
HDgfx_8_0_sh_mask.h3622 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT 0x1c macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h989 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT … macro
HDgc_9_2_1_sh_mask.h954 #define CP_STAT__ROQ_CE_RING_BUSY__SHIFT … macro