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Searched refs:CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h2929 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT 0x00000000 macro
HDgfx_7_2_sh_mask.h2562 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT 0x0 macro
HDgfx_8_1_sh_mask.h3648 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT 0x0 macro
HDgfx_8_0_sh_mask.h3126 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h19252 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT … macro
HDgc_9_2_1_sh_mask.h20615 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_SWAP__SHIFT … macro