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Searched refs:CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h2921 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x0000001d macro
HDgfx_7_2_sh_mask.h2574 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
HDgfx_8_1_sh_mask.h3660 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
HDgfx_8_0_sh_mask.h3138 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h19261 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
HDgc_9_2_1_sh_mask.h20624 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro