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Searched refs:CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_2_sh_mask.h1428 #define CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT 0x1 macro
HDgfx_8_1_sh_mask.h2336 #define CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT 0x1 macro
HDgfx_8_0_sh_mask.h1812 #define CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h11053 #define CP_PFP_F32_INTERRUPT__PRIV_REG_INT__SHIFT … macro