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Searched refs:CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h2407 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x0000001a macro
HDgfx_7_2_sh_mask.h1210 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
HDgfx_8_1_sh_mask.h2068 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
HDgfx_8_0_sh_mask.h1544 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h10900 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT … macro
HDgc_9_2_1_sh_mask.h12310 #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT … macro