Home
last modified time | relevance | path

Searched refs:CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h2377 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x00000016 macro
HDgfx_7_2_sh_mask.h1180 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
HDgfx_8_1_sh_mask.h2032 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
HDgfx_8_0_sh_mask.h1508 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT 0x16 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h10864 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro
HDgc_9_2_1_sh_mask.h12274 #define CP_INT_CNTL_RING0__PRIV_INSTR_INT_ENABLE__SHIFT … macro