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Searched refs:CP_HQD_HQ_CONTROL0__CONTROL__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_1_sh_mask.h4602 #define CP_HQD_HQ_CONTROL0__CONTROL__SHIFT 0x0 macro
HDgfx_8_0_sh_mask.h4080 #define CP_HQD_HQ_CONTROL0__CONTROL__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h12919 #define CP_HQD_HQ_CONTROL0__CONTROL__SHIFT … macro
HDgc_9_2_1_sh_mask.h14213 #define CP_HQD_HQ_CONTROL0__CONTROL__SHIFT … macro