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Searched refs:CP_HPD_STATUS0__QUEUE_STATE_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_1_sh_mask.h4399 #define CP_HPD_STATUS0__QUEUE_STATE_MASK 0x1f macro
HDgfx_8_0_sh_mask.h3877 #define CP_HPD_STATUS0__QUEUE_STATE_MASK 0x1f macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h12643 #define CP_HPD_STATUS0__QUEUE_STATE_MASK … macro
HDgc_9_2_1_sh_mask.h13937 #define CP_HPD_STATUS0__QUEUE_STATE_MASK … macro