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Searched refs:CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h2293 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT 0x00000010 macro
HDgfx_7_2_sh_mask.h2358 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT 0x10 macro
HDgfx_8_1_sh_mask.h3428 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT 0x10 macro
HDgfx_8_0_sh_mask.h2906 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT 0x10 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h19560 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT macro
HDgc_9_2_1_sh_mask.h20923 #define CP_EOP_DONE_DATA_CNTL__DST_SEL__SHIFT macro