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Searched refs:CPG_PERFCOUNTER0_SELECT__PERF_SEL_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_2_sh_mask.h2247 #define CPG_PERFCOUNTER0_SELECT__PERF_SEL_MASK 0x3f macro
HDgfx_8_1_sh_mask.h3315 #define CPG_PERFCOUNTER0_SELECT__PERF_SEL_MASK 0x3f macro
HDgfx_8_0_sh_mask.h2793 #define CPG_PERFCOUNTER0_SELECT__PERF_SEL_MASK 0x3f macro