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Searched refs:AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_sh_mask.h13297 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK 0x3 macro
HDdce_11_0_sh_mask.h13303 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK 0x3 macro
HDdce_11_2_sh_mask.h13919 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK 0x3 macro
HDdce_12_0_sh_mask.h7063 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h8198 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE_MASK … macro