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Searched refs:ATTR10__ATTR_PCLKBY2__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h425 #define ATTR10__ATTR_PCLKBY2__SHIFT 0x00000006 macro
HDdce_8_0_sh_mask.h10920 #define ATTR10__ATTR_PCLKBY2__SHIFT 0x6 macro
HDdce_10_0_sh_mask.h11304 #define ATTR10__ATTR_PCLKBY2__SHIFT 0x6 macro
HDdce_11_0_sh_mask.h11116 #define ATTR10__ATTR_PCLKBY2__SHIFT 0x6 macro
HDdce_11_2_sh_mask.h12370 #define ATTR10__ATTR_PCLKBY2__SHIFT 0x6 macro
HDdce_12_0_sh_mask.h64769 #define ATTR10__ATTR_PCLKBY2__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h46430 #define ATTR10__ATTR_PCLKBY2__SHIFT … macro