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Searched refs:ATTR10__ATTR_CSEL_EN__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_sh_mask.h415 #define ATTR10__ATTR_CSEL_EN__SHIFT 0x00000007 macro
HDdce_8_0_sh_mask.h10922 #define ATTR10__ATTR_CSEL_EN__SHIFT 0x7 macro
HDdce_10_0_sh_mask.h11306 #define ATTR10__ATTR_CSEL_EN__SHIFT 0x7 macro
HDdce_11_0_sh_mask.h11118 #define ATTR10__ATTR_CSEL_EN__SHIFT 0x7 macro
HDdce_11_2_sh_mask.h12372 #define ATTR10__ATTR_CSEL_EN__SHIFT 0x7 macro
HDdce_12_0_sh_mask.h64770 #define ATTR10__ATTR_CSEL_EN__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_sh_mask.h46431 #define ATTR10__ATTR_CSEL_EN__SHIFT … macro