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Searched refs:vsync_end (Results 1 – 21 of 21) sorted by relevance

/NextBSD/sys/dev/drm2/
HDdrm_modes.c57 mode->vsync_end, mode->vtotal, mode->type, mode->flags); in drm_mode_debug_printmodeline()
225 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()
257 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()
447 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; in drm_gtf_mode_complex()
678 p->crtc_vsync_end = p->vsync_end; in drm_mode_set_crtcinfo()
788 mode1->vsync_end == mode2->vsync_end && in drm_mode_equal()
HDdrm_mode.h91 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; member
HDdrm_edid.c880 mode->vsync_end *= 2; in drm_mode_do_interlace_quirk()
958 mode->vsync_end = mode->vsync_start + vsync_pulse_width; in drm_mode_detailed()
964 if (mode->vsync_end > mode->vtotal) in drm_mode_detailed()
965 mode->vtotal = mode->vsync_end + 1; in drm_mode_detailed()
HDdrm_crtc.h118 .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
143 int vsync_end; member
HDdrm_crtc.c1131 in->vsync_start > USHRT_MAX || in->vsync_end > USHRT_MAX || in drm_crtc_convert_to_umode()
1143 out->vsync_end = in->vsync_end; in drm_crtc_convert_to_umode()
1181 out->vsync_end = in->vsync_end; in drm_crtc_convert_umode()
/NextBSD/sys/dev/videomode/
HDvideomode.h42 int vsync_end; member
HDvesagtf.c629 vmp->vsync_end = vmp->vsync_start + params->vsync_rqd; in vesagtf_mode_params()
683 vmp->vdisplay, vmp->vsync_start, vmp->vsync_end, vmp->vtotal); in print_xf86_mode()
HDedid.c275 edid->edid_modes[i].vsync_end, in edid_print()
405 vmp->vsync_end = vmp->vsync_start + vsyncwid; in edid_det_timing()
/NextBSD/sys/dev/drm2/i915/
HDintel_panel.c52 adjusted_mode->vsync_end = fixed_mode->vsync_end; in intel_fixed_panel_mode()
HDintel_bios.c93 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + in fill_detail_timing_data()
113 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) in fill_detail_timing_data()
114 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; in fill_detail_timing_data()
HDintel_tv.c1101 .vsync_end = 1034,
1356 mode_ptr->vsync_end = vactive_s + 32; in intel_tv_get_modes()
1357 if (mode_ptr->vsync_end <= mode_ptr->vsync_start) in intel_tv_get_modes()
1358 mode_ptr->vsync_end = mode_ptr->vsync_start + 1; in intel_tv_get_modes()
HDintel_lvds.c816 scan->vsync_end == fixed_mode->vsync_end && in intel_find_lvds_downclock()
HDintel_sdvo.c756 v_sync_len = mode->vsync_end - mode->vsync_start; in intel_sdvo_get_dtd_from_mode()
812 mode->vsync_end = mode->vsync_start + in intel_sdvo_get_mode_from_dtd()
814 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; in intel_sdvo_get_mode_from_dtd()
HDintel_display.c5653 mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1; in intel_crtc_mode_get()
/NextBSD/sys/dev/drm2/radeon/
HDradeon_encoders.c286 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()
302 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; in radeon_panel_mode_fixup()
HDradeon_combios.c1352 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_combios_get_lvds_info()
HDradeon_atombios.c1584 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()
/NextBSD/sys/arm/ti/am335x/
HDam335x_lcd.c190 #define MODE_VBP(mode) ((mode)->vtotal - (mode)->vsync_end)
192 #define MODE_VSW(mode) ((mode)->vsync_end - (mode)->vsync_start)
860 sc->sc_panel.panel_vbp = videomode->vtotal - videomode->vsync_end; in am335x_lcd_hdmi_event()
861 sc->sc_panel.panel_vsw = videomode->vsync_end - videomode->vsync_start; in am335x_lcd_hdmi_event()
HDtda19988.c457 vs1_line_end = vs1_line_start + mode->vsync_end - mode->vsync_start; in tda19988_init_encoder()
469 vs1_line_end = vs1_line_start + (mode->vsync_end - mode->vsync_start)/2; in tda19988_init_encoder()
476 vs2_line_end = vs2_line_start + (mode->vsync_end - mode->vsync_start)/2; in tda19988_init_encoder()
/NextBSD/sys/arm/freescale/imx/
HDimx6_hdmi.c190 vbp = sc->sc_mode.vtotal - sc->sc_mode.vsync_end; in imx_hdmi_av_composer()
199 WR1(sc, HDMI_FC_VSYNCINWIDTH, (sc->sc_mode.vsync_end - sc->sc_mode.vsync_start)); in imx_hdmi_av_composer()
HDimx6_ipu.c73 #define MODE_VBP(mode) ((mode)->vtotal - (mode)->vsync_end)
75 #define MODE_VSW(mode) ((mode)->vsync_end - (mode)->vsync_start)