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Searched refs:subc (Results 1 – 20 of 20) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/MSP430/
HDMSP430InstrInfo.td869 "subc.b\t{$src2, $dst}",
874 "subc.w\t{$src2, $dst}",
880 "subc.b\t{$src2, $dst}",
885 "subc.w\t{$src2, $dst}",
891 "subc.b\t{$src2, $dst}",
896 "subc.w\t{$src2, $dst}",
903 "subc.b\t{$src, $dst}",
908 "subc.w\t{$src, $dst}",
914 "subc.b\t{$src, $dst}",
919 "subc.w\t{$src, $dst}",
[all …]
/NextBSD/contrib/gcc/
HDprint-rtl.c499 enum rtx_code subc = GET_CODE (sub); in print_rtx() local
503 if (subc == NOTE in print_rtx()
514 if (subc != CODE_LABEL) in print_rtx()
HDFSFChangeLog.113161 (addc, subc, ashlsi_c): New insns.
HDChangeLog-200223821 (add,addc1,addsi3,subc,subc1,*subsi3_internal,
HDChangeLog-20031673 (subc): Fix description of new T value.
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZInstrInfo.td795 defm SLR : BinaryRRAndK<"sl", 0x1F, 0xB9FB, subc, GR32, GR32>;
797 defm SLGR : BinaryRREAndK<"slg", 0xB90B, 0xB9EB, subc, GR64, GR64>;
800 // subc because we prefer addc for constants.
805 defm SL : BinaryRXPair<"sl", 0x5F, 0xE35F, subc, GR32, load, 4>;
806 def SLGF : BinaryRXY<"slgf", 0xE31B, subc, GR64, azextloadi32, 4>;
807 def SLG : BinaryRXY<"slg", 0xE30B, subc, GR64, load, 8>;
809 defm : ZXB<subc, GR64, SLGFR>;
/NextBSD/contrib/llvm/lib/Target/NVPTX/
HDNVPTXVector.td324 def SubCCV4I32 : VecBinaryOp<V4AsmStr<"sub.cc.s32">, subc, V4I32Regs,
326 def SubCCV2I32 : VecBinaryOp<V2AsmStr<"sub.cc.s32">, subc, V2I32Regs,
332 def SubCCCV4I32 : VecBinaryOp<V4AsmStr<"subc.cc.s32">, sube, V4I32Regs,
334 def SubCCCV2I32 : VecBinaryOp<V2AsmStr<"subc.cc.s32">, sube, V2I32Regs,
HDNVPTXInstrInfo.td400 defm SUBCC : ADD_SUB_INT_32<"sub.cc", subc>;
403 defm SUBCCC : ADD_SUB_INT_32<"subc.cc", sube>;
/NextBSD/contrib/binutils/gas/doc/
HDc-sh.texi309 sett subc Rm,Rn
/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcInstrAliases.td437 def : MnemonicAlias<"subc", "subx">, Requires<[HasV9]>;
HDSparcInstrInfo.td534 defm SUBCC : F3_12 <"subcc", 0b010100, subc, IntRegs, i32, simm13Op>;
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCInstr64Bit.td489 [(set i64:$rD, (subc imm64SExt16:$imm, i64:$rA))]>;
492 [(set i64:$rT, (subc i64:$rB, i64:$rA))]>,
HDPPCInstrInfo.td1895 [(set i32:$rD, (subc imm32SExt16:$imm, i32:$rA))]>;
2404 [(set i32:$rT, (subc i32:$rB, i32:$rA))]>,
3790 def : InstAlias<"subc $rA, $rB, $rC", (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
3791 def : InstAlias<"subc. $rA, $rB, $rC", (SUBFC8o g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMips64InstrInfo.td526 def : MipsPat<(subc GPR64:$lhs, GPR64:$rhs),
HDMips16InstrInfo.td1412 def : Mips16Pat<(subc CPU16Regs:$lhs, CPU16Regs:$rhs),
HDMipsInstrInfo.td1754 def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAG.td380 def subc : SDNode<"ISD::SUBC" , SDTIntBinOp,
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMInstrThumb.td1327 def : T1Pat<(subc tGPR:$lhs, tGPR:$rhs),
/NextBSD/contrib/binutils/opcodes/
HDChangeLog-0001724 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
/NextBSD/contrib/gdb/
HDmd5.sum4183 f32638a3919a1385e630a7e29518e0ed sim/testsuite/sim/fr30/subc.cgs