Searched refs:regclass_iterator (Results 1 – 8 of 8) sorted by relevance
| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | TargetRegisterInfo.h | 230 typedef const TargetRegisterClass * const * regclass_iterator; typedef 237 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses 242 regclass_iterator RegClassBegin, 243 regclass_iterator RegClassEnd, 601 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin() 602 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end()
|
| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | TargetRegisterInfo.cpp | 25 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo() 118 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ in getMinimalPhysRegClass() 148 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), in getAllocatableSet()
|
| HD | RegisterClassInfo.cpp | 159 for (TargetRegisterInfo::regclass_iterator in computePSetLimit()
|
| /NextBSD/contrib/llvm/include/llvm/MC/ |
| HD | MCRegisterInfo.h | 137 typedef const MCRegisterClass *regclass_iterator; typedef 399 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin() 400 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end()
|
| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | ResourcePriorityQueue.cpp | 60 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in ResourcePriorityQueue() 367 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta() 374 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta()
|
| HD | ScheduleDAGRRList.cpp | 1672 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in RegReductionPQBase() 1941 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in dumpRegPressure()
|
| HD | TargetLowering.cpp | 2255 for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), in getRegForInlineAsmConstraint()
|
| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIRegisterInfo.cpp | 75 for (regclass_iterator I = regclass_begin(), E = regclass_end(); in getRegPressureSetLimit()
|