Searched refs:rb_cntl (Results 1 – 2 of 2) sorted by relevance
1150 uint32_t rb_cntl; in cayman_cp_resume() local1155 rb_cntl = drm_order(ring->ring_size / 8); in cayman_cp_resume()1156 rb_cntl |= drm_order(RADEON_GPU_PAGE_SIZE/8) << 8; in cayman_cp_resume()1158 rb_cntl |= BUF_SWAP_32BIT; in cayman_cp_resume()1160 WREG32(cp_rb_cntl[i], rb_cntl); in cayman_cp_resume()1260 u32 rb_cntl; in cayman_dma_stop() local1265 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); in cayman_dma_stop()1266 rb_cntl &= ~DMA_RB_ENABLE; in cayman_dma_stop()1267 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl); in cayman_dma_stop()1270 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); in cayman_dma_stop()[all …]
2340 u32 rb_cntl = RREG32(DMA_RB_CNTL); in r600_dma_stop() local2344 rb_cntl &= ~DMA_RB_ENABLE; in r600_dma_stop()2345 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_stop()2361 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local2379 rb_cntl = rb_bufsz << 1; in r600_dma_resume()2381 rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE; in r600_dma_resume()2383 WREG32(DMA_RB_CNTL, rb_cntl); in r600_dma_resume()2396 rb_cntl |= DMA_RPTR_WRITEBACK_ENABLE; in r600_dma_resume()2419 WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE); in r600_dma_resume()