Home
last modified time | relevance | path

Searched refs:printAndVerify (Results 1 – 4 of 4) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/NVPTX/
HDNVPTXTargetMachine.cpp243 printAndVerify("After Machine Scheduling"); in addOptimizedRegAlloc()
251 printAndVerify("After StackSlotColoring"); in addOptimizedRegAlloc()
257 printAndVerify("After Pre-RegAlloc TailDuplicate"); in addMachineSSAOptimization()
276 printAndVerify("After codegen DCE pass"); in addMachineSSAOptimization()
282 printAndVerify("After ILP optimizations"); in addMachineSSAOptimization()
288 printAndVerify("After Machine LICM, CSE and Sinking passes"); in addMachineSSAOptimization()
291 printAndVerify("After codegen peephole optimization pass"); in addMachineSSAOptimization()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonTargetMachine.cpp178 printAndVerify("After hexagon peephole pass"); in addInstSelector()
/NextBSD/contrib/llvm/lib/CodeGen/
HDPasses.cpp360 void TargetPassConfig::printAndVerify(const std::string &Banner) { in printAndVerify() function in TargetPassConfig
514 printAndVerify("After Instruction Selection"); in addMachinePasses()
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDPasses.h356 void printAndVerify(const std::string &Banner);