| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZInstrFormats.td | 601 // Depending on the instruction mnemonic, certain bits may be or-ed into 631 // Depending on the instruction mnemonic, certain bits may be or-ed into 690 // Depending on the instruction mnemonic, certain bits may be or-ed into 954 class InherentRRE<string mnemonic, bits<16> opcode, RegisterOperand cls, 957 mnemonic#"\t$R1", 962 class InherentVRIa<string mnemonic, bits<16> opcode, bits<16> value> 963 : InstVRIa<opcode, (outs VR128:$V1), (ins), mnemonic#"\t$V1", []> { 968 class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls> 970 mnemonic##"\t$R1, $I2", []> { 977 class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls> [all …]
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86InstrArithmetic.td | 633 /// 1. Concatenates together the instruction mnemonic with the appropriate 640 string mnemonic, string args, list<dag> pattern, 645 !strconcat(mnemonic, "{", typeinfo.InstrSuffix, "}\t", args), pattern, 654 class BinOpRR<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 659 mnemonic, "{$src2, $src1|$src1, $src2}", pattern, itin>, 664 class BinOpRR_F<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 666 : BinOpRR<opcode, mnemonic, typeinfo, (outs), 673 class BinOpRR_RF<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, 675 : BinOpRR<opcode, mnemonic, typeinfo, (outs typeinfo.RegClass:$dst), 682 class BinOpRR_RFF<bits<8> opcode, string mnemonic, X86TypeInfo typeinfo, [all …]
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| HD | X86InstrCompiler.td | 552 Format ImmMod, string mnemonic> { 559 !strconcat(mnemonic, "{b}\t", 565 !strconcat(mnemonic, "{w}\t", 571 !strconcat(mnemonic, "{l}\t", 577 !strconcat(mnemonic, "{q}\t", 584 !strconcat(mnemonic, "{b}\t", 591 !strconcat(mnemonic, "{w}\t", 598 !strconcat(mnemonic, "{l}\t", 605 !strconcat(mnemonic, "{q}\t", 612 !strconcat(mnemonic, "{w}\t", [all …]
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| /NextBSD/contrib/binutils/opcodes/ |
| HD | s390-mkopc.c | 46 char mnemonic[16]; member 70 insertOpcode (char *opcode, char *mnemonic, char *format, in insertOpcode() argument 109 strcpy(op_array[ix].mnemonic, mnemonic); in insertOpcode() 144 printf (" { \"%s\", ", op_array[ix].mnemonic); in dumpTable() 176 char mnemonic[16]; in main() local 189 opcode, mnemonic, format, description, in main() 228 insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits); in main()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonInstrInfoV4.td | 128 class T_ALU32_3op_not<string mnemonic, bits<3> MajOp, bits<3> MinOp, 130 : T_ALU32_3op<mnemonic, MajOp, MinOp, OpsRev, 0> { 131 let AsmString = "$Rd = "#mnemonic#"($Rs, ~$Rt)"; 164 class T_CMP_rrbh<string mnemonic, bits<3> MinOp, bit IsComm> 166 "$Pd = "#mnemonic#"($Rs, $Rt)", [], "", S_3op_tc_2early_SLOT23>, 169 let CextOpcode = mnemonic; 208 class T_CMP_ribh<string mnemonic, bits<2> MajOp, bit IsHalf, bit IsComm, 211 "$Pd = "#mnemonic#"($Rs, #$Imm)", [], "", ALU64_tc_2early_SLOT23>, 214 let CextOpcode = mnemonic; 244 class T_RCMP_EQ_ri<string mnemonic, bit IsNeg> [all …]
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| HD | HexagonInstrInfo.td | 68 class T_CMP <string mnemonic, bits<2> MajOp, bit isNot, Operand ImmOp> 71 "$dst = "#!if(isNot, "!","")#mnemonic#"($src1, #$src2)", 76 let CextOpcode = mnemonic; 77 let opExtentBits = !if(!eq(mnemonic, "cmp.gtu"), 9, 10); 78 let isExtentSigned = !if(!eq(mnemonic, "cmp.gtu"), 0, 1); 84 let Inst{21} = !if(!eq(mnemonic, "cmp.gtu"), 0, src2{9}); 119 class T_ALU32_3op<string mnemonic, bits<3> MajOp, bits<3> MinOp, bit OpsRev, 122 "$Rd = "#mnemonic#"($Rs, $Rt)", 125 let BaseOpcode = mnemonic#_rr; 126 let CextOpcode = mnemonic; [all …]
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| HD | HexagonInstrInfoV5.td | 151 class T_MInstFloat <string mnemonic, bits<3> MajOp, bits<3> MinOp> 154 "$Rd = "#mnemonic#"($Rs, $Rt)", [], 239 class T_fcmp <string mnemonic, RegisterClass RC, bits<3> MinOp, 242 "$dst = "#mnemonic#"($src1, $src2)", pattern, 258 class T_fcmp64 <string mnemonic, PatFrag OpNode, bits<3> MinOp> 259 : T_fcmp <mnemonic, DoubleRegs, MinOp, 265 class T_fcmp32 <string mnemonic, PatFrag OpNode, bits<3> MinOp> 266 : T_fcmp <mnemonic, IntRegs, MinOp, 529 class F2_RDD_RSS_CONVERT<string mnemonic, bits<3> MinOp, 533 "$Rdd = "#mnemonic#"($Rss)"#chop, [all …]
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| /NextBSD/crypto/openssl/crypto/perlasm/ |
| HD | sparcv9_modes.pl | 1390 my ($mnemonic,$rs1,$rs2,$rd)=@_; 1398 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 1400 if ($opf=$visopf{$mnemonic}) { 1420 my ($mnemonic,$rs1,$rs2,$rd)=@_; 1430 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 1432 if ($opf=$visopf{$mnemonic}) { 1447 my ($mnemonic,$rs1,$rs2,$rs3,$rd)=@_; 1459 $ref = "$mnemonic\t$rs1,$rs2,$rs3,$rd"; 1461 if (defined($opf=$aesopf{$mnemonic})) { 1482 my ($mnemonic,$rs1,$rs2,$rd)=@_; [all …]
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| HD | x86_64-xlate.pl | 175 sub mnemonic { subroutine 227 die if (opcode->mnemonic() ne "mov"); 228 opcode->mnemonic("lea"); 283 (opcode->mnemonic() =~ /^v?mov([qd])$/) && ($sz=$1) || 284 (opcode->mnemonic() =~ /^v?pinsr([qdwb])$/) && ($sz=$1) || 285 (opcode->mnemonic() =~ /^vpbroadcast([qdwb])$/) && ($sz=$1) || 286 (opcode->mnemonic() =~ /^vinsert[fi]128$/) && ($sz="x"); 426 if ($nasm && opcode->mnemonic()=~m/^j(?![re]cxz)/) { 868 my $asm = eval("\$".$opcode->mnemonic()); 911 undef $sz if ($nasm && $opcode->mnemonic() eq "lea");
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| HD | ppc-xlate.pl | 234 my $mnemonic = $2; 236 my $opcode = eval("\$$mnemonic"); 239 elsif ($mnemonic) { $line = $c.$mnemonic.$f."\t".$line; }
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| /NextBSD/crypto/openssl/crypto/sha/asm/ |
| HD | sha1-sparcv9.pl | 375 my ($mnemonic,$rs1,$rs2,$rd)=@_; 380 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 382 if ($opf=$visopf{$mnemonic}) { 401 my ($mnemonic,$rs1,$rs2,$rd)=@_; 403 my $ref="$mnemonic\t$rs1,$rs2,$rd";
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| HD | sha1-armv8.pl | 316 my ($mnemonic,$arg)=@_; 321 $opcode{$mnemonic}|$1|($2<<5)|($3<<16), 322 $mnemonic,$arg;
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| HD | sha1-sparcv9a.pl | 551 my ($mnemonic,$rs1,$rs2,$rd)=@_; 559 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 561 if ($opf=$visopf{$mnemonic}) { 580 my ($mnemonic,$rs1,$rs2,$rd)=@_; 582 my $ref="$mnemonic\t$rs1,$rs2,$rd";
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| HD | sha512-armv8.pl | 400 my ($mnemonic,$arg)=@_; 405 $opcode{$mnemonic}|$1|($2<<5)|($3<<16), 406 $mnemonic,$arg;
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| HD | sha512-sparcv9.pl | 798 my ($mnemonic,$rs1,$rs2,$rd)=@_; 803 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 805 if ($opf=$visopf{$mnemonic}) { 824 my ($mnemonic,$rs1,$rs2,$rd)=@_; 826 my $ref="$mnemonic\t$rs1,$rs2,$rd";
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| /NextBSD/crypto/openssl/crypto/md5/asm/ |
| HD | md5-sparcv9.pl | 378 my ($mnemonic,$rs1,$rs2,$rd)=@_; 383 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 385 if ($opf=$visopf{$mnemonic}) { 404 my ($mnemonic,$rs1,$rs2,$rd)=@_; 406 my $ref="$mnemonic\t$rs1,$rs2,$rd";
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| /NextBSD/contrib/binutils/gas/config/ |
| HD | tc-cr16.c | 787 while (cr16_instruction[i].mnemonic != NULL) in md_begin() 790 const char *mnemonic = cr16_instruction[i].mnemonic; in md_begin() local 792 hashret = hash_insert (cr16_inst_hash, mnemonic, in md_begin() 796 as_fatal (_("Can't hash `%s': %s\n"), cr16_instruction[i].mnemonic, in md_begin() 807 while (cr16_instruction[i].mnemonic != NULL in md_begin() 808 && streq (cr16_instruction[i].mnemonic, mnemonic)); in md_begin() 1397 if (streq (cr16_no_op_insn[i], instruction->mnemonic)) in parse_insn() 2104 assemble_insn (char *mnemonic, ins *insn) in assemble_insn() argument 2157 && instruction->mnemonic != NULL in assemble_insn() 2159 && IS_INSN_MNEMONIC (mnemonic) in assemble_insn()
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| HD | tc-spu.c | 123 retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]); in md_begin() 127 spu_opcodes[i].mnemonic, retval); in md_begin() 240 len += sprintf (&buf[len], "%s\t", format->mnemonic); in insn_fmt_string() 290 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0) in md_assemble() 318 if (!strcmp (format[0].mnemonic, format[1].mnemonic)) in md_assemble()
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| HD | tc-i386.c | 1643 intel_float_operand (const char *mnemonic) in intel_float_operand() argument 1649 if (mnemonic[0] != 'f') in intel_float_operand() 1652 switch (mnemonic[1]) in intel_float_operand() 1660 if (mnemonic[2] == 'd' && (mnemonic[3] == 'c' || mnemonic[3] == 'e')) in intel_float_operand() 1664 if (mnemonic[2] != 'o' /* fnop */) in intel_float_operand() 1668 if (mnemonic[2] == 's') in intel_float_operand() 1672 if (mnemonic[2] == 'a') in intel_float_operand() 1674 if (mnemonic[2] == 't') in intel_float_operand() 1676 switch (mnemonic[3]) in intel_float_operand() 1687 if (mnemonic[2] == 'r' || mnemonic[2] == 's') in intel_float_operand() [all …]
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| /NextBSD/crypto/openssl/crypto/modes/asm/ |
| HD | ghashv8-armx.pl | 373 my ($mnemonic,$arg)=@_; 379 $word |= 0x00010001 if ($mnemonic =~ "2"); 386 $mnemonic,$arg;
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| /NextBSD/crypto/openssl/crypto/aes/asm/ |
| HD | aesv8-armx.pl | 888 my ($mnemonic,$arg)=@_; 892 $opcode{$mnemonic}|$1|($2<<5), 893 $mnemonic,$arg; 928 my ($mnemonic,$arg)=@_; 931 my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19) 939 $mnemonic,$arg;
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| /NextBSD/crypto/openssl/crypto/bn/asm/ |
| HD | vis3-mont.pl | 340 my ($mnemonic,$rs1,$rs2,$rd)=@_; 347 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 349 if ($opf=$visopf{$mnemonic}) {
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| /NextBSD/contrib/binutils/include/opcode/ |
| HD | cr16.h | 255 const char *mnemonic; member 421 (strcmp (instruction->mnemonic, MNEMONIC) == 0)
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| /NextBSD/sys/dev/cxgbe/tom/ |
| HD | t4_cpl_io.c | 104 flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; in send_flowc_wr() 106 flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; in send_flowc_wr() 108 flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT; in send_flowc_wr() 110 flowc->mnemval[3].mnemonic = FW_FLOWC_MNEM_IQID; in send_flowc_wr() 115 flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDNXT; in send_flowc_wr() 117 flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_RCVNXT; in send_flowc_wr() 119 flowc->mnemval[6].mnemonic = FW_FLOWC_MNEM_SNDBUF; in send_flowc_wr() 121 flowc->mnemval[7].mnemonic = FW_FLOWC_MNEM_MSS; in send_flowc_wr() 129 flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDBUF; in send_flowc_wr() 131 flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_MSS; in send_flowc_wr()
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| /NextBSD/contrib/binutils/gas/doc/ |
| HD | c-i386.texi | 185 @cindex mnemonic suffixes, i386 188 @cindex mnemonic suffixes, x86-64 193 character of the instruction mnemonic. Mnemonic suffixes of @samp{b}, 239 assembler which assumes that a missing mnemonic suffix implies long 241 since compilers always explicitly specify the mnemonic suffix.) 247 is accomplished by using two instruction mnemonic suffixes in AT&T 250 and @samp{movzx} in Intel syntax). The instruction mnemonic suffixes 530 instruction mnemonic suffix (@samp{b}, @samp{w}, @samp{l} or @samp{q}, 591 Each supported type has an instruction mnemonic suffix and a constructor 592 associated with it. Instruction mnemonic suffixes specify the operand's [all …]
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