| /NextBSD/contrib/llvm/include/llvm/MC/ |
| HD | MCInstrAnalysis.h | 54 virtual bool isReturn(const MCInst &Inst) const { in isReturn() function 55 return Info->get(Inst.getOpcode()).isReturn(); in isReturn()
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| HD | MCInstrDesc.h | 211 bool isReturn() const { return Flags & (1 << MCID::Return); } in isReturn() function
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86PadShortFunction.cpp | 132 assert(ReturnLoc->isReturn() && !ReturnLoc->isCall() && in runOnMachineFunction() 189 if (MI->isReturn() && !MI->isCall()) { in cyclesUntilReturn()
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| HD | X86InstrControl.td | 22 let isTerminator = 1, isReturn = 1, isBarrier = 1, 230 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, 283 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
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| HD | X86VZeroUpper.cpp | 184 bool isControlFlow = MI->isCall() || MI->isReturn(); in processBasicBlock()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMOptimizeBarriersPass.cpp | 45 MI->isReturn()); in CanMovePastDMB()
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| HD | Thumb2ITBlockPass.cpp | 217 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { in InsertITInstructions()
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| /NextBSD/contrib/llvm/lib/MC/ |
| HD | MCInstrDesc.cpp | 35 if (isBranch() || isCall() || isReturn() || isIndirectBranch()) in mayAffectControlFlow()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonFrameLowering.cpp | 237 if (I->isReturn()) in hasReturn() 373 if (!B.empty() && B.back().isReturn()) in emitPrologue() 377 if (!B.empty() && B.back().isReturn()) in emitPrologue() 567 if (!I.isReturn()) in insertEpilogueInBlock() 795 assert(It->isReturn() && std::next(It) == MBB.end()); in insertCSRRestoresInBlock()
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| /NextBSD/contrib/llvm/lib/Target/NVPTX/ |
| HD | NVPTXPrologEpilogPass.cpp | 75 if (!I->empty() && I->back().isReturn()) in runOnMachineFunction()
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| /NextBSD/contrib/llvm/lib/CodeGen/AsmPrinter/ |
| HD | DbgValueHistoryCalculator.cpp | 149 if (LastMI == MBB.end() || !LastMI->isReturn()) in getFirstEpilogueInst()
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| /NextBSD/contrib/llvm/utils/TableGen/ |
| HD | CodeGenInstruction.h | 225 bool isReturn : 1; variable
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| HD | InstrInfoEmitter.cpp | 483 if (Inst.isReturn) OS << "|(1ULL<<MCID::Return)"; in emitRecord()
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| HD | CodeGenInstruction.cpp | 300 isReturn = R->getValueAsBit("isReturn"); in CodeGenInstruction()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCInstr64Bit.td | 85 let isReturn = 1, Uses = [LR8, RM] in 118 let isReturn = 1, Defs = [CTR8], Uses = [CTR8, LR8, RM] in { 254 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 260 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 265 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 271 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR8, RM] in 277 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 283 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
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| HD | PPCFrameLowering.cpp | 273 if (!I->empty() && I->back().isReturn()) { in RemoveVRSaveCode() 328 if (MBB.empty() || !MBB.back().isReturn()) in HandleVRSaveUpdate()
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| HD | PPCInstrInfo.td | 1097 let isReturn = 1, Uses = [LR, RM] in 1143 let isReturn = 1, Uses = [LR, RM] in 1157 let isReturn = 1, Uses = [LR, RM] in 1164 let isReturn = 1, Defs = [CTR], Uses = [CTR, LR, RM] in { 1312 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1319 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1324 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1333 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 1338 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 1344 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HD | HexagonShuffler.cpp | 176 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isReturn()) in check()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | CriticalAntiDepBreaker.cpp | 55 bool IsReturnBlock = (BBSize != 0 && BB->back().isReturn()); in StartBlock()
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| HD | TailDuplication.cpp | 595 if (PreRegAlloc && I->isReturn()) in shouldTailDuplicate()
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| HD | PrologEpilogInserter.cpp | 132 return (MBB && !MBB->empty() && MBB->back().isReturn()); in isReturnBlock()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZFrameLowering.cpp | 419 assert(MBBI->isReturn() && "Can only insert epilogue into returning blocks"); in emitEpilogue()
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| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | MachineInstr.h | 399 bool isReturn(QueryType Type = AnyInBundle) const {
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsInstrInfo.td | 304 bit isReturn = 1; 314 bit isReturn = 1; 840 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, hasDelaySlot = 1, 1074 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1 in 1381 let isReturn = 1; 1402 let Uses = [V0, V1], isTerminator = 1, isReturn = 1, isBarrier = 1 in {
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| HD | MipsDelaySlotFiller.cpp | 667 assert((!CurrI->isCall() && !CurrI->isReturn() && !CurrI->isBranch()) && in searchRange()
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