| /NextBSD/contrib/llvm/tools/clang/include/clang/AST/ |
| HD | LambdaCapture.h | 100 bool isImplicit() const { return DeclAndBits.getInt() & Capture_Implicit; } in isImplicit() function 104 bool isExplicit() const { return !isImplicit(); } in isExplicit()
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| HD | ExprObjC.h | 925 bool isImplicit); 935 bool isImplicit); 945 bool isImplicit); 1045 bool isImplicit); 1079 bool isImplicit); 1113 bool isImplicit); 1129 bool isImplicit() const { return IsImplicit; } 1310 if (isImplicit()) 1328 if (isImplicit())
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| HD | Attr.h | 101 bool isImplicit() const { return Implicit; } in isImplicit() function
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| /NextBSD/contrib/llvm/tools/clang/lib/Frontend/ |
| HD | ASTConsumers.cpp | 285 else if (D->isImplicit()) in PrintDeclContext() 315 else if (D->isImplicit()) in PrintDeclContext() 344 else if (D->isImplicit()) in PrintDeclContext() 360 else if (D->isImplicit()) in PrintDeclContext()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | MachineInstr.cpp | 312 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print() 320 if (isImplicit()) in print() 328 } else if (isImplicit()) { in print() 727 bool isImpReg = Op.isReg() && Op.isImplicit(); in addOperand() 729 while (OpNo && Operands[OpNo-1].isReg() && Operands[OpNo-1].isImplicit()) { in addOperand() 970 if (!MO.isReg() || !MO.isImplicit()) in getNumExplicitOperands() 1523 if ((MO.isReg() && MO.isImplicit()) || MO.isRegMask()) in copyImplicitOps() 1567 !getOperand(StartOp).isImplicit(); in print() 1630 MO.isReg() && MO.isImplicit() && MO.isDef()) { in print() 1813 if (getOperand(OpIdx).isImplicit()) in addRegisterKilled() [all …]
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| HD | StackMaps.cpp | 40 !MI->getOperand(0).isImplicit()), in PatchPointOpers() 47 !MI->getOperand(CheckStartIdx).isImplicit()) in PatchPointOpers() 64 MI->getOperand(ScratchIdx).isImplicit() && in getNextScratchIdx() 132 if (MOI->isImplicit()) in parseOperand()
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| HD | MachineVerifier.cpp | 774 if (!MO.isReg() || !MO.isImplicit()) in verifyInlineAsm() 833 else if (MO->isImplicit()) in visitMachineOperand() 843 if (MO->isImplicit()) in visitMachineOperand() 859 if (MO->isReg() && !MO->isImplicit() && !MI->isVariadic() && MO->getReg()) in visitMachineOperand() 887 if (!OtherMO.isImplicit()) in visitMachineOperand() 901 if (MONum < MCID.getNumOperands() && !MO->isImplicit()) { in visitMachineOperand() 1077 if (!MOP.isImplicit()) in checkLiveness()
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| HD | MIRPrinter.cpp | 272 !MI.getOperand(I).isImplicit(); in print() 307 if (Op.isImplicit()) in print()
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| HD | ExpandPostRAPseudos.cpp | 74 if (!MO.isReg() || !MO.isImplicit() || MO.isUse()) in TransferImplicitDefs()
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| /NextBSD/contrib/llvm/tools/clang/lib/Sema/ |
| HD | SemaCUDA.cpp | 54 } else if (D->isImplicit()) { in IdentifyCUDATarget() 97 if (Caller->isImplicit()) return false; in CheckCUDATarget()
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| HD | SemaAttr.cpp | 382 if (A->isImplicit()) in UnifySection() 385 if (A->isImplicit()) in UnifySection()
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| /NextBSD/contrib/llvm/lib/Target/BPF/ |
| HD | BPFMCInstLower.cpp | 57 if (MO.isImplicit()) in Lower()
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| /NextBSD/contrib/llvm/tools/clang/lib/AST/ |
| HD | Expr.cpp | 2712 return This->isImplicit(); in isImplicitCXXThis() 3507 bool isImplicit) in ObjCMessageExpr() argument 3516 IsImplicit(isImplicit), SuperLoc(SuperLoc), LBracLoc(LBracLoc), in ObjCMessageExpr() 3533 bool isImplicit) in ObjCMessageExpr() argument 3541 IsImplicit(isImplicit), LBracLoc(LBracLoc), RBracLoc(RBracLoc) in ObjCMessageExpr() 3557 bool isImplicit) in ObjCMessageExpr() argument 3566 IsImplicit(isImplicit), LBracLoc(LBracLoc), RBracLoc(RBracLoc) in ObjCMessageExpr() 3591 if (!isImplicit()) { in initArgsAndSelLocs() 3608 bool isImplicit) { in Create() argument 3609 assert((!SelLocs.empty() || isImplicit) && in Create() [all …]
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| HD | DeclCXX.cpp | 425 if (!D->isImplicit() && in addedMember() 474 if (!isBeingDefined() && D->isImplicit()) in addedMember() 483 if (!Constructor->isImplicit()) { in addedMember() 531 ? UserProvided : !Constructor->isImplicit()) in addedMember() 596 if (!Method->isImplicit() && !Method->isUserProvided()) { in addedMember() 609 if (!Method->isImplicit()) { in addedMember() 940 assert(!D->isImplicit() && !D->isUserProvided()); in finishedDefaultedOrDeletedMember() 1950 return isImplicit() && getParent()->isLambda() && in isLambdaToBlockPointerConversion()
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| HD | DeclObjC.cpp | 108 if (MD && MD->isInstanceMethod() && !MD->isImplicit()) in HasUserDeclaredSetterMethod() 117 if (!MD->isImplicit()) in HasUserDeclaredSetterMethod() 624 if (C != Cat || !MethodDecl->isImplicit()) in lookupMethod() 641 if (C != Cat || !MethodDecl->isImplicit()) in lookupMethod() 766 assert((!SelLocs.empty() || isImplicit()) && in setMethodParams() 768 if (isImplicit()) in setMethodParams()
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| /NextBSD/contrib/llvm/lib/Target/Sparc/ |
| HD | SparcMCInstLower.cpp | 75 if (MO.isImplicit()) in LowerOperand()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64DeadRegisterDefinitionsPass.cpp | 82 assert(!MO.isImplicit() && "Unexpected implicit def!"); in processMachineBasicBlock()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZMCInstLower.cpp | 100 if (!MO.isReg() || !MO.isImplicit()) in lower()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonMCInstLower.cpp | 69 if (MO.isImplicit()) continue; in HexagonLowerToMC()
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| HD | HexagonExpandCondsets.cpp | 280 if (Op.isImplicit() && IsDef != SetDef) in makeDefined() 514 if (!Op.isReg() || !Op.isUse() || Op.isImplicit() || Op.isUndef()) in addInstrToLiveness() 918 if (!MO.isReg() || !MO.isImplicit()) in predicateAt() 1115 if (MO.isReg() && MO.isUse() && MO.isImplicit()) in removeImplicitUses() 1142 if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.isUndef()) { in postprocessUndefImplicitUses()
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| /NextBSD/contrib/llvm/lib/Target/XCore/ |
| HD | XCoreMCInstLower.cpp | 89 if (MO.isImplicit()) break; in LowerOperand()
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| /NextBSD/contrib/llvm/lib/Target/MSP430/ |
| HD | MSP430MCInstLower.cpp | 126 if (MO.isImplicit()) continue; in Lower()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIFixSGPRLiveRanges.cpp | 119 if (MO.isImplicit()) in runOnMachineFunction()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMMCInstLower.cpp | 74 if (MO.isImplicit() && MO.getReg() != ARM::CPSR) in lowerOperand()
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| /NextBSD/contrib/llvm/lib/CodeGen/MIRParser/ |
| HD | MIParser.cpp | 232 assert(MO.isImplicit()); in printImplicitRegisterFlag() 271 if (Operand.isReg() && Operand.isImplicit()) { in verifyImplicitOperands()
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