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Searched refs:isDef (Results 1 – 25 of 101) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/X86/
HDX86Subtarget.cpp71 bool isDef = GV->isStrongDefinitionForLinker(); in ClassifyGlobalReference() local
83 if (GV->hasDefaultVisibility() && !isDef) in ClassifyGlobalReference()
109 if (isDef) in ClassifyGlobalReference()
133 if (isDef) in ClassifyGlobalReference()
/NextBSD/contrib/llvm/lib/CodeGen/
HDLiveRangeCalc.cpp62 if (!MO.isDef() && !MO.readsReg()) in calculate()
93 if (MO.isDef()) in calculate()
100 if (MO.isDef()) in calculate()
107 if (MO.isDef() && !LI.hasSubRanges()) in calculate()
171 assert(!MO.isDef() && "Cannot handle PHI def of partial register."); in extendToUses()
179 if (MO.isDef()) in extendToUses()
HDMachineInstr.cpp170 void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, in ChangeToRegister() argument
188 IsDef = isDef; in ChangeToRegister()
218 return getReg() == Other.getReg() && isDef() == Other.isDef() && in isIdenticalTo()
261 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef()); in hash_value()
312 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print()
316 if (isDef()) { in print()
892 if (MO.isDef()) { in isIdenticalTo()
946 if (!MO.isReg() || !MO.isDef()) in eraseFromParentAndMarkDBGValuesForRemoval()
1214 if (!MO.isReg() || !MO.isDef()) in findRegisterDefOperandIdx()
1267 assert(DefMO.isDef() && "DefIdx must be a def operand"); in tieOperands()
[all …]
HDMachineInstrBundle.cpp140 if (MO.isDef()) { in finalizeBundle()
279 if (MO.isDef()) in analyzeVirtReg()
284 if (MO.isDef()) in analyzeVirtReg()
326 if (!MO.isDef()) in analyzePhysReg()
HDMachineLICM.cpp459 if (!MO.isDef()) { in ProcessMI()
587 if (!MO.isReg() || MO.isDef() || !MO.getReg()) in HoistRegionPostRA()
617 if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue; in AddToLiveIns()
805 if (!MO.isDef() || !MO.isReg() || !MO.getReg()) in SinkIntoLoop()
895 if (MO.isDef()) in calcRegisterCost()
1017 if (!MO.isReg() || !MO.isDef()) in HasLoopPHIUse()
1087 if (!DefMO.isReg() || !DefMO.isDef()) in IsCheapInstruction()
1183 if (MO.isDef() && HasHighOperandLatency(MI, i, Reg)) { in IsProfitableToHoist()
1331 if (MO.isReg() && MO.isDef() && in EliminateCSE()
1427 if (MO.isReg() && MO.isDef() && !MO.isDead()) in Hoist()
HDLiveRangeEdit.cpp171 if (MO.isDef()) { in foldAsLoad()
275 else if (MOI->isDef()) in eliminateDeadDef()
285 if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) || in eliminateDeadDef()
290 if (MOI->isDef()) { in eliminateDeadDef()
HDCriticalAntiDepBreaker.cpp264 if (!MO.isDef()) continue; in ScanInstruction()
341 if (RefOper->isDef() && RefOper->isEarlyClobber()) in isNewRegClobberedByRefs()
352 if (!CheckOper.isReg() || !CheckOper.isDef() || in isNewRegClobberedByRefs()
358 if (RefOper->isDef()) in isNewRegClobberedByRefs()
607 if (MO.isDef() && Reg != AntiDepReg) in BreakAntiDependencies()
HDDeadMachineInstructionElim.cpp74 if (MO.isReg() && MO.isDef()) { in isDead()
144 if (MO.isReg() && MO.isDef()) { in runOnMachineFunction()
HDLivePhysRegs.cpp48 if (!O->isDef()) in stepBackward()
81 if (O->isDef()) { in stepForward()
HDVirtRegMap.cpp402 if (MO.readsReg() && (MO.isDef() || MO.isKill())) in rewrite()
405 if (MO.isDef()) { in rewrite()
420 assert(MO.isDef()); in rewrite()
436 if (MO.isDef()) in rewrite()
HDRegisterScavenging.cpp138 assert(MO.isDef()); in determineKillsAndDefs()
235 assert(MO.isDef()); in forward()
317 if (MO.isDef()) in findSurvivorReg()
HDMachineCSE.cpp225 if (!MO.isReg() || MO.isDef()) in hasLivePhysRegDefUses()
244 if (!MO.isReg() || !MO.isDef()) in hasLivePhysRegDefUses()
320 if (!MO.isReg() || !MO.isDef()) in PhysRegDefsReach()
538 if (!MO.isReg() || !MO.isDef()) in ProcessBlock()
HDImplicitNullChecks.cpp225 if (MO.isDef()) in analyzeBlockForNullChecks()
267 if (MO.isDef()) in analyzeBlockForNullChecks()
HDAggressiveAntiDepBreaker.cpp229 if (MO.isDef()) in IsImplicitDefUse()
242 if ((MO.isDef() && MI->isRegTiedToUseOperand(i)) || in GetPassthruRegs()
350 if (!MO.isReg() || !MO.isDef()) continue; in PrescanInstruction()
360 if (!MO.isReg() || !MO.isDef()) continue; in PrescanInstruction()
400 if (!MO.isReg() || !MO.isDef()) continue; in PrescanInstruction()
HDStackMaps.cpp39 : MI(MI), HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() && in PatchPointOpers()
46 MI->getOperand(CheckStartIdx).isDef() && in PatchPointOpers()
63 MI->getOperand(ScratchIdx).isDef() && in getNextScratchIdx()
HDRegAllocFast.cpp695 if (MO.isDef() && MO.isUndef()) in setPhysReg()
725 if (!MO.isReg() || !MO.isDef()) continue; in handleThroughOperands()
780 if (!MO.isReg() || (MO.isDef() && !MO.isEarlyClobber())) continue; in handleThroughOperands()
1003 if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue; in AllocateBasicBlock()
1027 if (!MO.isReg() || !MO.isDef() || !MO.getReg() || MO.isEarlyClobber()) in AllocateBasicBlock()
HDMIRPrinter.cpp271 for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() && in print()
308 OS << (Op.isDef() ? "implicit-def " : "implicit "); in print()
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDMachineOperand.h282 bool isDef() const { in isDef() function
571 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
597 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
604 assert(!(isDead && !isDef) && "Dead flag on non-def");
605 assert(!(isKill && isDef) && "Kill flag on def");
607 Op.IsDef = isDef;
HDMachineRegisterInfo.h818 (!ReturnDefs && op->isDef()) || in defusechain_iterator()
839 while (Op && ((!ReturnDefs && Op->isDef()) || in advance()
920 (!ReturnDefs && op->isDef()) || in defusechain_instr_iterator()
941 while (Op && ((!ReturnDefs && Op->isDef()) || in advance()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64Subtarget.cpp60 bool isDef = GV->isStrongDefinitionForLinker(); in ClassifyGlobalReference() local
87 return isDef ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT; in ClassifyGlobalReference()
HDAArch64DeadRegisterDefinitionsPass.cpp55 if (MO.isReg() && MO.isDef()) in implicitlyDefinesOverlappingReg()
81 if (MO.isReg() && MO.isDead() && MO.isDef()) { in processMachineBasicBlock()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonExpandCondsets.cpp309 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) in makeUndead()
337 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) in shrinkToUses()
437 if (Op.isReg() && Op.isDef()) in addInstrToLiveness()
553 if (!Op.isReg() || !Op.isDef()) in removeInstrFromLiveness()
720 assert(MD.isDef()); in split()
758 if (!Op.isReg() || !Op.isDef()) in isPredicable()
795 if (!Op.isReg() || !Op.isDef()) in getReachingDefForPred()
842 if (Op.isDef() && isRefInMap(RR, Uses, Exec_Then)) in canMoveOver()
908 if (!MO.isReg() || !MO.isDef()) in predicateAt()
959 assert(!Op.isDef() && "Not expecting a def"); in renameInRange()
[all …]
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDSIInsertWaits.cpp182 if (Op.isDef()) in isOpRelevant()
302 if (Op.isDef()) in pushInstruction()
401 if (Op.isDef()) { in handleOperands()
434 if (Op.isReg() && Op.isDef() && Op.getReg() == AMDGPU::M0) in handleSendMsg()
/NextBSD/contrib/llvm/lib/Target/ARM/
HDARMSubtarget.cpp289 bool isDef = GV->isStrongDefinitionForLinker(); in GVIsIndirectSymbol() local
299 if (isDef) in GVIsIndirectSymbol()
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDDeadStoreElimination.cpp498 if (!InstDep.isDef() && !InstDep.isClobber()) in runOnBasicBlock()
534 while (InstDep.isDef() || InstDep.isClobber()) { in runOnBasicBlock()
659 while (Dep.isDef() || Dep.isClobber()) { in HandleFree()

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